Methods of forming semiconductor device
A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.
1. A method of manufacturing a semiconductor device, comprising:
forming a gate structure on a substrate, the substrate comprising source/drain (S/D) regions, and the gate structure being disposed on the substrate and laterally between the S/D regions;
forming a dielectric structure covering the gate structure, the dielectric structure comprising a first dielectric layer laterally surrounding the gate structure and a second dielectric layer disposed over the first dielectric layer and the gate structure;
forming a contact structure penetrating through the dielectric structure to connect to the S/D regions; and
forming an air gap between the contact structure and the first dielectric layer of the dielectric structure, wherein the S/D regions are exposed at a bottom of the air gap.
2. The method of claim 1 , wherein forming the contact structure and forming the air gap comprise:
forming a contact hole in the dielectric structure;
forming a sacrificial layer in the contact hole;
forming the contact structure in the contact hole, wherein the sacrificial layer is laterally between the dielectric structure and the contact structure;
removing the sacrificial layer to form a first air gap laterally between the contact structure and the dielectric structure; and
performing a sealing process to seal a top of the first air gap, and remaining a second air gap laterally between lower portions of the contact structure and the dielectric structure.
3. The method of claim 2 , wherein performing the sealing process comprises:
performing a doping process on the second dielectric layer to form an expanded second dielectric layer, wherein a width of the expanded second dielectric layer is greater that a width of the second dielectric layer.
4. The method of claim 3 further comprising:
forming a first etch stop layer between the first dielectric layer and the second dielectric layer, and an expansion of the second dielectric layer is constrained by the first etch stop layer, wherein the expanded second dielectric layer further has a larger thickness than the second dielectric layer and protrudes from a top surface of the contact structure; and
performing a planarization process to remove a portion of the expanded second dielectric layer protruding over the contact structure.
5. The method of claim 2 further comprising:
forming a first etch stop layer between the first dielectric layer and the second dielectric layer; and
forming a second etch stop layer on the second dielectric layer and the contact structure after the first air gap is formed and before performing the sealing process,
wherein an expansion of the second dielectric layer is constrained by the first etch stop layer and the second etch stop layer.
6. The method of claim 1 , wherein performing the sealing process comprises forming a sealing material laterally between the second dielectric layer and the contact structure to seal the top of the first air gap.
7. The method of claim 6 , wherein forming the sealing material comprises:
forming an etch stop layer on the second dielectric layer and the contact structure, wherein a portion of the etch stop layer is formed to extend into the first air gap, and the portion of the etch stop layer serves as the sealing material.
8. A method, comprising:
forming a gate structure over a substrate comprising source/drain (S/D) regions;
forming a dielectric structure comprising contact holes on the substrate to cover the gate structure, the contact holes revealing the source/drain regions, the dielectric structure comprising a first dielectric layer and a second dielectric layer, wherein the first dielectric layer is in contact with and laterally surrounds the gate structure, and the second dielectric layer covers the first dielectric layer and the gate structure;
forming sacrificial layers and contact structures in the contact holes, wherein the contact structures are spaced apart from the first dielectric layer of the dielectric structure by the sacrificial layers;
removing the sacrificial layers to form air gaps laterally between the contact structures and the dielectric structure, wherein the S/D regions are exposed at bottom portions of the air gaps after removing the sacrificial layers; and
sealing top portions of the air gaps.
9. The method of claim 8 , wherein the S/D regions are exposed by the air gaps before sealing the top portions of the air gap.
10. The method of claim 8 , wherein the sealing the top portions of the air gaps comprises forming an etch stop layer on the second dielectric layer and the contact structure, portions of the etch stop layer are formed to extend into the air gaps.
11. The method of claim 8 , wherein the sealing the top portions of the air gaps comprises forming a sealing material filled into the air gaps, and the sealing material is spaced apart from the S/D regions.
12. The method of claim 8 , wherein the sealing the top portions of the air gaps comprises performing a doping process on the second dielectric layer to form an expanded second dielectric layer, and a height of the air gaps substantially equals to a height of the gate structure after sealing the top portions of the air gaps.
13. The method of claim 8 , wherein the sealing the top portions of the air gaps comprises performing a doping process on an upper portion of the second dielectric layer to form an expanded second dielectric layer, and a height of the air gaps is greater than a height of the gate structure after sealing the top portions of the air gaps.
14. The method of claim 8 , wherein the sealing the top portions of the air gaps comprises performing a doping process on the second dielectric layer and an upper portion of the first dielectric layer to form an expanded second dielectric layer and an expanded first dielectric layer, and a height of the air gaps is less than a height of the gate structure after sealing the top portions of the air gaps.
15. The method of claim 8 further comprising:
forming a first etch stop layer between the first dielectric layer and the second dielectric layer, and an expansion of the second dielectric layer is constrained by the first etch stop layer during sealing the top portions of the air gaps, wherein the expanded second dielectric layer further has a larger thickness than the second dielectric layer and protrudes from a top surface of the contact structure; and
performing a planarization process to remove a portion of the expanded second dielectric layer protruding over the contact structure.
16. The method of claim 8 further comprising:
forming a first etch stop layer between the first dielectric layer and the second dielectric layer; and
after the air gaps are formed and before sealing the top portions of the air gaps, forming a second etch stop layer on the second dielectric layer and the contact structure,
wherein an expansion of the second dielectric layer is constrained by the first etch stop layer and the second etch stop layer during sealing the top portions of the air gaps.
17. A method, comprising:
forming a gate structure over a substrate comprising source/drain (S/D) regions;
forming a dielectric structure comprising a contact hole on the substrate to cover the gate structure, the contact hole revealing one of the S/D regions, the dielectric structure comprising a first dielectric layer and a second dielectric layer, wherein the first dielectric layer is in contact with and laterally surrounds the gate structure, and the second dielectric layer covers the first dielectric layer and the gate structure;
forming a sacrificial layer and a contact structure in the contact hole, wherein the contact structure is spaced apart from the dielectric structure by the sacrificial layer;
removing the sacrificial layer to form an air gap laterally between the contact structures and the dielectric structure; and
performing a sealing process to expand at least a width of the second dielectric layer to form an expanded second dielectric layer until the expanded second dielectric layer abuts the contact structure.
18. The method of claim 17 , wherein the sealing process comprises a doping process performed on the second dielectric layer to form the expanded second dielectric layer.
19. The method of claim 17 , wherein the sealing process comprises a doping process performed on an upper portion of the second dielectric layer to form the expanded second dielectric layer.
20. The method of claim 17 , wherein the sealing process comprises a doping process performed on the second dielectric layer and an upper portion of the first dielectric layer to form the expanded second dielectric layer and an expanded first dielectric layer.