IP Library Granted Patent US 12,373,703
Granted Patent B2
US 12,373,703 · App. 17/240,412 · Granted Jul 29, 2025

Artificial neural network remapping in memory

Inventors: Poorna Kale (Folsom, CA); Saideep Tiku (Fort Collins, CO)
Assignee: Micron Technology, Inc.
G06N3/10G06F11/073
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Quick Facts
Patent No.
US 12,373,703
App. No.
17/240,412
Granted
Jul 29, 2025
Kind
B2
Abstract

An artificial neural network can be allocated to memory and operated. An error can occur in the memory and/or be detected in the memory. Layers of the artificial neural network can be remapped in the memory at least partially in response to the error. Performance of the artificial neural network can be evaluated before and/or after the remapping.

Claims (76)

1. A method, comprising:

operating an artificial neural network allocated to memory;

detecting an error in the memory; and

remapping a plurality of layers of the artificial neural network in the memory at least partially in response to detecting the error;

wherein remapping the plurality of layers comprises remapping while operating the artificial neural network.

2. The method of claim 1 , wherein operating the artificial neural network comprises writing values to the memory according to a first logical-to-physical mapping, the values indicative of weights of the artificial neural network; and

wherein remapping the plurality of layers comprises writing the values to the memory according to a second logical-to-physical mapping.

3. The method of claim 2 , wherein the artificial neural network includes a plurality of computational paths, each of the plurality of computational paths traversing at least two respective layers of the plurality of layers; and

wherein the second logical-to-physical mapping causes the error to be associated with a different computational path than the first logical-to-physical mapping.

4. The method of claim 1 , further comprising performing a quantity of remappings of the plurality of layers by writing the values to the memory according to respective different logical-to-physical mappings;

wherein each different logical-to-physical mapping causes the error to be associated with a different computational path than previous logical-to-physical mappings.

5. The method of claim 4 , further comprising retraining the artificial neural network after the quantity of remappings.

6. The method of claim 1 , further comprising evaluating performance of the artificial neural network after the remapping; and

initiating a subsequent remapping in response to the evaluation yielding a sub-threshold result.

7. The method of claim 1 , wherein remapping the plurality of layers further comprises remapping at least partially in response to a user input.

8. The method of claim 1 , further comprising evaluating performance of the artificial neural network prior to remapping; and

wherein remapping the plurality of layers further comprises remapping without user input at least partially in response to a result of the evaluation.

9. The method of claim 1 , wherein detecting the error comprises detecting a bit error or bit freeze in the memory.

10. An apparatus, comprising:

a memory array; and

control circuitry coupled to the memory array and configured to:

write values to the memory array according to a first logical-to-physical mapping, the values indicative of weights of an artificial neural network;

detect an error in the memory array;

determine a first layer of the artificial neural network that is mapped to a physical location of the memory array having the error; and

write the values to the memory array according to a second logical-to-physical mapping such that a second layer is mapped to the physical location of the memory array having the error.

11. The apparatus of claim 10 , wherein the control circuitry is further configured to evaluate performance of the artificial neural network with the first logical-to-physical mapping; and

write the values to the memory array according to the second logical-to-physical mapping in response to a sub-threshold result of the evaluation.

12. The apparatus of claim 11 , wherein the control circuitry is further configured to evaluate performance of the artificial neural network with the second logical-to-physical mapping; and

write the values to the memory array according to a third logical-to-physical mapping such that a third layer is mapped to the physical location of the memory array having the error in response to a sub-threshold result of the evaluation with the second logical-to-physical mapping.

13. The apparatus of claim 12 , wherein the first layer, the second layer, and the third layer each correspond to a different respective computational path of the artificial neural network.

14. The apparatus of claim 12 , wherein at least two of the first layer, the second layer, and the third layer correspond to a same computational path of the artificial neural network.

15. The apparatus of claim 10 , wherein the control circuitry is further configured to write the values to the memory array according to a plurality of successive different logical-to-physical mappings such that a different layer is mapped to the physical location of the memory array having the error for each successive mapping.

16. The apparatus of claim 15 , wherein the control circuitry is further configured to retrain the artificial neural network in response to the plurality of successive different mappings reaching a particular quantity of mappings.

17. The apparatus of claim 16 , wherein the apparatus is part of remote system; and

wherein the particular quantity of mappings is set based on a reliability or lifetime expectation of the remote system.

18. The apparatus of claim 15 , wherein the control circuitry is further configured to:

evaluate performance of the artificial neural network with each successive mapping; and

retrain the artificial neural network in response to a sub-threshold result of the evaluation for a predefined quantity of the successive mappings.

19. A non-transitory machine-readable medium having computer-readable instructions, which when executed by a machine, cause the machine to:

operate an artificial neural network allocated to memory;

receive a report of an error in the memory;

cause a plurality of layers of the artificial neural network to be remapped to a first remapping in the memory such that a different layer of a plurality of layers of the artificial neural network is mapped to a physical location of the memory having the error;

evaluate performance of the artificial neural network after the first remapping;

cause a second remapping in response to a sub-threshold result of the performance evaluation of the artificial neural network after the first remapping; and

operate the artificial neural network with the first remapping in response to a threshold result of the performance evaluation of the artificial neural network after the first remapping.

20. The medium of claim 19 , further comprising instructions to:

evaluate performance of the artificial neural network in response to receiving the report of the error; and

cause the plurality of layers of the artificial neural network to be remapped to a preemptive remapping in response to a sub-threshold result of a performance evaluation of the artificial neural network before the first remapping.

21. The medium of claim 19 , wherein any instructions to cause the plurality of layers to be remapped comprise instructions to cause the plurality of layers to be remapped while the artificial neural network is being operated.

22. The medium of claim 19 , further comprising instructions to cause the artificial neural network to be retrained in response to a sub-threshold result of a performance evaluation of the artificial neural network after a predefined quantity of remappings.

23. The medium of claim 19 , further comprising instructions to prompt a user for authorization to cause the first remapping.

24. A method, comprising:

operating an artificial neural network allocated to memory, wherein operating the artificial neural network comprises writing values to the memory according to a first logical-to-physical mapping, the values indicative of weights of the artificial neural network;

detecting an error in the memory; and

remapping a plurality of layers of the artificial neural network in the memory at least partially in response to detecting the error, wherein remapping the plurality of layers comprises writing the values to the memory according to a second logical-to-physical mapping.

25. The method of claim 24 , wherein the artificial neural network includes a plurality of computational paths, each of the plurality of computational paths traversing at least two respective layers of the plurality of layers; and

wherein the second logical-to-physical mapping causes the error to be associated with a different computational path than the first logical-to-physical mapping.

26. A method, comprising:

operating an artificial neural network allocated to memory;

detecting an error in the memory;

remapping a plurality of layers of the artificial neural network in the memory at least partially in response to detecting the error; and

performing a quantity of remappings of the plurality of layers by writing the values to the memory according to respective different logical-to-physical mappings;

wherein each different logical-to-physical mapping causes the error to be associated with a different computational path than previous logical-to-physical mappings.

27. The method of claim 26 , further comprising retraining the artificial neural network after the quantity of remappings.

28. A method, comprising:

operating an artificial neural network allocated to memory;

detecting an error in the memory;

remapping a plurality of layers of the artificial neural network in the memory at least partially in response to detecting the error;

evaluating performance of the artificial neural network after the remapping; and

initiating a subsequent remapping in response to the evaluation yielding a sub-threshold result.

29. A method, comprising:

operating an artificial neural network allocated to memory;

detecting an error in the memory;

remapping a plurality of layers of the artificial neural network in the memory at least partially in response to detecting the error; and

evaluating performance of the artificial neural network prior to remapping;

wherein remapping the plurality of layers further comprises remapping without user input at least partially in response to a result of the evaluation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2021
From: KALE, POORNA; TIKU, SAIDEEP
To: MICRON TECHNOLOGY, INC.
Reel/Frame 056041/0718 →
Continuity (1)
Related Publication 20220343177A1 · Oct 27, 2022
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