IP Library Granted Patent US 12,374,598
Granted Patent B2
US 12,374,598 · App. 17/757,087 · Granted Jul 29, 2025

Semiconductor apparatus including Peltier element

Inventors: Yoichiro Fujinaga (Kanagawa, JP); Masami Suzuki (Kanagawa, JP); Tasuku Ogami (Kanagawa, JP)
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
H01L23/38H01L23/3114H01L24/08H01L24/16H01L24/48H01L2224/08113H01L2224/16055H01L2224/48149
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Quick Facts
Patent No.
US 12,374,598
App. No.
17/757,087
Granted
Jul 29, 2025
Kind
B2
Abstract

Provided with a semiconductor apparatus which is able to be miniaturized and is provided with a Peltier element. The semiconductor apparatus is provided with a semiconductor substrate and the Peltier element which is disposed facing the semiconductor substrate. The Peltier element has a first substrate and a thermoelectric semiconductor which is disposed between the first substrate and the semiconductor substrate. The semiconductor substrate has a first electrode provided on a surface side facing the first substrate. The first substrate has a second electrode provided on a surface side facing the semiconductor substrate. The first electrodes and the second electrodes are each connected to the thermoelectric semiconductor.

Claims (19)

1. A semiconductor apparatus, comprising:

a semiconductor substrate;

a Peltier element that faces the semiconductor substrate, wherein the Peltier element includes

a first substrate, and

a thermoelectric semiconductor between the first substrate and the semiconductor substrate,

a first electrode directly on a surface side of the semiconductor substrate that faces the first substrate; and

a second electrode on a surface side of the first substrate that faces the semiconductor substrate, wherein each of the first electrode and the second electrode are connected to the thermoelectric semiconductor.

2. The semiconductor apparatus according to claim 1 , further comprising a first through electrode that penetrates the semiconductor substrate in a thickness direction, wherein the first through electrode is connected to the first electrode.

3. The semiconductor apparatus according to claim 1 , further comprising a package that accommodates and seals, in an airtight manner, the semiconductor substrate and the Peltier element.

4. The semiconductor apparatus according to claim 1 , further comprising a first rewiring layer in the semiconductor substrate, wherein the first rewiring layer is on an opposite side of the surface side that faces the first substrate.

5. The semiconductor apparatus according to claim 1 , further comprising a second rewiring layer in the first substrate, wherein the second rewiring layer is on an opposite side of the surface side that faces the semiconductor substrate.

6. The semiconductor apparatus according to claim 1 , wherein

the thermoelectric semiconductor includes

a plurality of first thermoelectric semiconductors that have a first electrical conductivity type, and

a plurality of second thermoelectric semiconductors that have a second electrical conductivity type, wherein the first electrical conductivity type is different from the second electrical conductivity type, and

the first thermoelectric semiconductors and the second thermoelectric semiconductors are alternatingly connected in series via the first electrode and the second electrode.

7. The semiconductor apparatus according to claim 6 , further comprising an electrical conductor adjacent to the first thermoelectric semiconductors and the second thermoelectric semiconductors with respective intervals.

8. The semiconductor apparatus according to claim 6 , further comprising an insulating resin between the first thermoelectric semiconductors and the second thermoelectric semiconductors.

9. The semiconductor apparatus according to claim 6 , further comprising electrical conductors between the first thermoelectric semiconductors and the second thermoelectric semiconductors with respective intervals, wherein each of the electrical conductors are electrically separated from the first thermoelectric semiconductors and the second thermoelectric semiconductors.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2022
From: FUJINAGA, YOICHIRO; SUZUKI, MASAMI; OGAMI, TASUKU
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 060210/0708 →
Priority Claims (1)
JP 2019-229289 · Dec 19, 2019 · national
Continuity (1)
Related Publication 20230005813A1 · Jan 5, 2023
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Cited By (1)
US 12,701,916