IP Library › Granted Patent US 12,375,718
Granted Patent B2
US 12,375,718 · App. 17/614,649 · Granted Jul 29, 2025

Image decoding apparatus

Inventors: Tomohiro Ikai (Sakai, JP); Tomonori Hashimoto (Sakai, JP)
Assignee: SHARP KABUSHIKI KAISHA
H04N19/61H04N19/11H04N19/122H04N19/159H04N19/176H04N19/18
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Quick Facts
Patent No.
US 12,375,718
App. No.
17/614,649
Granted
Jul 29, 2025
Kind
B2
Abstract

There is a problem in that implicit MTS performance is lost in a case that the implict MTS is combined with secondary transform. The present invention provides an image decoding apparatus that can more preferably apply transform by MTS and secondary transform. A video decoding apparatus includes: a second transformer configured to apply transform using a transform matrix to the transform coefficient to modify the transform coefficient in a case that secondary transform is enabled; a first transformer configured to apply separate transform including vertical transform and horizontal transform to the transform coefficient; and an implicit transform configuration unit configured to disable implicit transform in a case that the secondary transform is enabled, an intra subpartition mode is not used, and subblock transform is not used, and configured to derive a horizontal transform type according to a width of a target TU and derive a vertical transform type according to a height of the target TU in a case that the implicit transform is enabled. The first transformer performs transform according to the vertical transform type, and transform according to the horizontal transform type.

Claims (8)

1. An image decoding apparatus for transforming a transform coefficient for each transform unit (TU), the image decoding apparatus comprising:

a decoding circuit configured to decode a secondary index indicating whether or not a secondary transform is used and a multiple transform selection (MTS) index being a switch index for selecting a transform basis of a core transform, and derive a secondary transform matrix based on the secondary index and a transform size;

a second transform circuit configured to apply the secondary transform to the transform coefficient by using the secondary transform matrix in a case that the secondary transform is enabled, and reconstruct a modification transform coefficient; and

a core transform circuit configured to apply separate transforms including a vertical transform and a horizontal transform to the transform coefficient or the modification transform coefficient, wherein

the core transform circuit includes an MTS configuration circuit and an implicit MTS configuration circuit,

the MTS configuration circuit derives a horizontal transform type variable and a vertical transform type variable according to the MTS index, in a case that an explicit MTS is enabled,

the implicit MTS configuration circuit is configured to (i) disable an implicit transform in a case that a value of the secondary index is not equal to 0, an intra subpartition mode is not used, and a subblock transform is not used, and (ii) set a value of the horizontal transform type variable equal to 1 if the value of the secondary index is equal to 0 and a width of a TU is greater than or equal to 4 and less than or equal to 16, and set a value of the vertical transform type variable equal to 1 if the value of the secondary index is equal to 0 and a height of the TU is greater than or equal to 4 and less than or equal to 16, and

the core transform circuit performs the vertical transform according to the vertical transform type variable, and the horizontal transform according to the horizontal transform type variable.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 29, 2021
From: IKAI, TOMOHIRO; HASHIMOTO, TOMONORI
To: SHARP KABUSHIKI KAISHA
Reel/Frame 058225/0083 →
Priority Claims (1)
JP 2019-101179 · May 30, 2019 · national
Continuity (1)
Related Publication 20220232255A1 · Jul 21, 2022
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