IP Library › Granted Patent US 12,379,941
Granted Patent B2
US 12,379,941 · App. 18/326,420 · Granted Aug 5, 2025

Integrated circuit with multifunction capability

Inventors: David Hisky (Austin, TX); Daniel Weber (Austin, TX); Jonathan E. Eklund (Austin, TX); Adam Brickman (Austin, TX)
Assignee: Cirrus Logic Inc.
G06F9/44505G06F8/61
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Quick Facts
Patent No.
US 12,379,941
App. No.
18/326,420
Granted
Aug 5, 2025
Kind
B2
Abstract

In an example there is provided an integrated circuit configured to perform a plurality of functions, the integrated circuit comprising a memory, wherein each function of the integrated circuit is configured to transmit a request to a processor, and wherein the integrated circuit is configured such that the first function to detect that its request has been serviced by the processor is configured to download firmware and/or configuration data for itself and for at least one other function.

Claims (7)

1. An integrated circuit configured to control an output component and configured to perform a plurality of audio functions that are related to the output component, the integrated circuit comprising a memory comprising register addresses allocated to said audio functions, wherein each of the plurality of audio functions of the integrated circuit is configured to transmit a request to an external processor, and wherein the integrated circuit is configured to receive an indication from the external processor that one of the requests was serviced, and configured such that whichever audio function is first to detect that its request has been serviced by the processor is configured to transmit a request for firmware and/or configuration data for itself and for at least one other of the audio functions, the integrated circuit being configured to download the firmware and/or configuration data into the integrated circuit by writing the firmware and/or configuration data to the register addresses allocated to said audio functions.

2. The integrated circuit of claim 1 , wherein the request is made by utilising an SDCA class-conformant function mechanism.

3. The integrated circuit of claim 1 , wherein each of the audio functions other than the audio function which is first to detect that its request has been serviced by the processor is blocked or held or placed in a wait state by utilising a class-conformant function mechanism.

4. The integrated circuit of claim 1 , wherein the integrated circuit is configured to determine whether the memory is fully initialised and wherein each of the plurality of audio functions is configured to download the firmware and/or configuration data if it is determined that the memory is not fully initialised.

5. The integrated circuit of claim 1 , wherein the integrated circuit is configured to determine whether an initialisation of the memory is in progress and wherein each audio function downloads the firmware and/or configuration data if it is determined that no initialisation of the memory is in progress.

6. The integrated circuit of claim 1 , wherein the integrated circuit is configured such that the operation of each audio function other than the audio function which is first to detect that its request has been serviced by the external processor is blocked or held or placed in a wait state until the loading of the firmware and/or configuration data is complete.

7. The integrated circuit of claim 1 , wherein the request is one of a file transfer request or a register write request.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2025
From: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
To: CIRRUS LOGIC, INC.
Reel/Frame 071495/0051 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2023
From: HISKY, DAVID; WEBER, DANIEL; EKLUND, JONATHAN E.; BRICKMAN, ADAM
To: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
Reel/Frame 063937/0458 →
Priority Claims (1)
GB 2212815 · Sep 2, 2022 · national
Continuity (2)
Provisional Application 63350094 · Jun 8, 2022
Related Publication 20230409348A1 · Dec 21, 2023
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