IP Library › Granted Patent US 12,381,150
Granted Patent B2
US 12,381,150 · App. 17/870,674 · Granted Aug 5, 2025

Electronic device

Inventors: Pao-Nan Lee (Kaohsiung, TW); Jung Jui Kang (Kaohsiung, TW); Chang Chi Lee (Kaohsiung, TW)
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
H01L23/5286H01L23/481H01L23/49816H01L23/5226H01L24/16H01L24/48H01L24/73H01L2224/16227H01L2224/48091H01L2224/48248H01L2224/73265
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Quick Facts
Patent No.
US 12,381,150
App. No.
17/870,674
Granted
Aug 5, 2025
Kind
B2
Abstract

An electronic device is disclosed. The electronic device includes a carrier including a first region and a second region distinct from the first region. The electronic device also includes an electronic component covering the first region and at least partially exposing the second region. The electronic device also includes a first power regulating element in the second region of the carrier and a second power regulating element. The second power regulating element is disposed adjacent to the first power regulating element and electrically connected to the electronic component through the first power regulating element to provide a first power path.

Claims (48)

1. An electronic device, comprising:

a carrier including a first region and a second region distinct from the first region;

an electronic component covering the first region and at least partially exposing the second region;

a first power regulating element in the second region of the carrier;

a second power regulating element at least partially overlapped with the first power regulating element; and

a third power regulating element disposed adjacent to a side of the carrier and electrically connected to the carrier,

wherein the second power regulating element is configured to regulate a power from the third power regulating element and provide a regulated power to the first power regulating element, and

wherein the second power regulating element is electrically connected to the electronic component through the first power regulating element to provide a first power path, and the first power path passes through a backside surface of the electronic component.

2. The electronic device of claim 1 , further comprising:

a fourth power regulating element within the carrier and disposed at a first side of the electronic component;

wherein the first power regulating element is disposed at a second side of the electronic component adjacent to the first side of the electronic component; and

wherein the fourth power regulating element is electrically connected to the electronic component to provide a second power path passing through the backside surface of the electronic component.

3. The electronic device of claim 2 , wherein the first power path is configured to transmit a first power having a first voltage, the second power path is configured to transmit a second power having a second voltage different from the first voltage.

4. The electronic device of claim 2 , further comprising:

a fifth power regulating element at least partially overlapped with the fourth power regulating element, wherein the fifth power regulating element is configured to regulate a power from the carrier and provide a regulated power to the fourth power regulating element.

5. The electronic device of claim 1 , further comprising:

a fourth power regulating element disposed adjacent to a side of the carrier; and

a connection element having a first end connected to the fourth power regulating element and a second end connected to the backside surface of the electronic component,

wherein the connection element is configured to provide a second power path between the fourth power regulating element and the electronic component, and the second power path is distinct from the first power path.

6. An electronic device, comprising:

a silicon interposer including a first region and a second region distinct from the first region;

an electronic component disposed over the first region of the silicon interposer;

a deep trench capacitor (DTC) in the second region of the silicon interposer; and

a first power regulating element disposed above the DTC and the silicon interposer,

wherein the DTC is configured to provide a power to the electronic component by a first power path passing through a backside surface of the electronic component, and

wherein the silicon interposer comprises a through silicon via (TSV) electrically connected to the first power regulating element to provide a second power path, and the first power regulating element is electrically connected to the DTC to connect the first power path with the second power path.

7. The electronic device of claim 6 , further comprising:

a second power regulating element disposed adjacent to a side of the silicon interposer; and

a first connection element disposed over the second power regulating element, wherein the first connection element connects the second power regulating element to the DTC.

8. The electronic device of claim 7 , further comprising:

a second connection element disposed over the silicon interposer, wherein the second connection element extends along a lateral surface of the electronic component and connects the DTC to the backside surface of the electronic component.

9. An electronic device, comprising:

a carrier including a first region and a second region distinct from the first region;

an electronic component disposed over the first region; and

a first power regulating element in the second region of the carrier,

wherein the first power regulating element and the electronic component are collectively configured to provide a first power path extending along a first lateral surface of the electronic component to a backside surface of the electronic component, and

wherein the electronic component covers a portion of the first power regulating element and exposes a terminal of the first power regulating element as a part of the first power path.

10. The electronic device of claim 9 , further comprising:

a first connection element disposed over the first lateral surface of the electronic component and electrically connecting the terminal of the first power regulating element with a conductive pad of the electronic component.

11. The electronic device of claim 9 , further comprising:

a second power regulating element in the carrier and adjacent to a second lateral surface of the electronic component; and

wherein the second power regulating element and the electronic component are collectively configured to provide a second power path extending along the second lateral surface of the electronic component to the backside surface of the electronic component.

12. The electronic device of claim 11 , wherein the electronic component comprises a first portion and a second portion, wherein the first portion of the electronic component is configured to receive a first power from the first power regulating element and the second portion of the electronic component is configured to receive a second power from the second power regulating element, and wherein a voltage of the first power is different from a voltage of the second power.

13. The electronic device of claim 9 , further comprising:

a memory unit disposed on a third lateral surface of the electronic component, wherein the carrier comprises a bridge circuit configured to provide a signal path between the electronic component and the memory unit.

14. The electronic device of claim 13 , further comprising:

a third power regulating element in the carrier and adjacent to a side of the memory unit; and

a third connection element having a first end connected to the third power regulating element and a second end connected to a backside surface of the memory unit to provide a third power path.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2022
From: LEE, PAO-NAN; KANG, JUNG JUI; LEE, CHANG CHI
To: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Reel/Frame 060776/0339 →
Continuity (1)
Related Publication 20240030135A1 · Jan 25, 2024
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