Baseline restorer circuit
A baseline restorer circuit including a controller; a sample control circuit arranged to receive an input voltage signal that is output from a circuit stage comprising an amplifier, and configured to capture a sample of the input voltage signal at a sampling time in response to receiving a control signal from the controller; an analogue processing stage to receive the sample and a constant baseline reference voltage and selectively process the sample to provide an output voltage; a transconductance stage to convert the output voltage to a compensation current and supply the compensation current to an input of the circuit stage; and a change detector to monitor if the input voltage signal changes during a time interval around the sampling time, and if no change is detected in the input voltage signal during the time interval, the controller is configured to control the analogue processing stage to process the sample.
1. A baseline restorer circuit, the baseline restorer circuit comprising:
a controller;
a sample control circuit arranged to receive an input voltage signal that is output from a circuit stage comprising an amplifier, wherein the sample control circuit is configured to capture a sample of the input voltage signal at a sampling time in response to receiving a first control signal from the controller;
an analogue processing stage arranged to receive the sample of the input voltage signal and a constant baseline reference voltage and selectively process the sample of the input voltage signal to provide an output voltage;
a transconductance stage configured to convert the output voltage to a compensation current and supply the compensation current to an input of the circuit stage; and
a change detector configured to monitor if the input voltage signal changes during a time interval around the sampling time, and if no change is detected in the input voltage signal during the time interval, the controller is further configured to transmit a second control signal to the analogue processing stage to control the analogue processing stage to process the sample of the input voltage signal,
wherein the change detector comprises a change detector stage arranged to continuously receive the input voltage signal, and
wherein commencement and expiry of the time interval is controlled by the controller transmitting a third control signal to the change detector.
2. The baseline restorer circuit of claim 1 , wherein at commencement of the time interval the change detector is configured to capture an instantaneous value of the input voltage signal and is configured to monitor if the input voltage signal changes during the time interval by comparing the input voltage signal to said instantaneous value of the input voltage signal.
3. The baseline restorer circuit of claim 2 , wherein the change detector is configured to:
determine a voltage difference value based on said comparing; and
determine that the input voltage signal has changed during the time interval by at least one of:
detecting that the voltage difference value is less than a first negative predetermined threshold voltage; and
detecting that the voltage difference value is greater than a second positive predetermined threshold voltage.
4. The baseline restorer circuit of claim 1 , wherein the change detector comprises a change detector stage arranged to receive a digital signal output from an energy discriminator, wherein the digital signal is generated by the energy discriminator in dependence on a comparison of a level of the input voltage signal with at least one threshold value, the change detector stage configured to monitor if the input voltage signal changes during a time interval around the sampling time based on the digital signal.
5. The baseline restorer circuit of claim 4 , wherein the change detector stage is configured to determine that the input voltage signal has changed during the time interval by detecting a change of state of the digital signal.
6. The baseline restorer circuit of claim 1 , wherein the change detector is arranged to supply an output signal to the controller, said output signal indicating whether the input voltage signal has changed during the time interval.
7. The baseline restorer circuit of claim 1 , wherein if the change detector detects a change in the input voltage signal during the time interval, the controller is further configured to transmit the second control signal to the analogue processing stage to control the analogue processing stage to discard the sample of the input voltage signal.
8. A photon counting circuit, comprising:
the baseline restorer circuit according to claim 1 ;
a photon detector having a photon sensitive area, the photon detector being configured to generate a current signal in dependence on an impact of a photon on the photon sensitive area;
the circuit stage comprising the amplifier, the circuit stage arranged to receive the current signal and provide the input voltage signal in response to the current signal; and
an energy discriminator being connected to the circuit stage, the energy discriminator being configured to generate a digital signal in dependence on a comparison of a level of the input voltage signal with at least one threshold value.
9. A device for medical diagnostics, comprising a photon counting circuitry of claim 8 , wherein the device is configured as an X-ray apparatus or a computed tomography scanner.
10. A baseline restorer circuit, the baseline restorer circuit comprising:
a controller;
a sample control circuit arranged to receive an input voltage signal that is output from a circuit stage comprising an amplifier, wherein the sample control circuit is configured to capture a sample of the input voltage signal at a sampling time in response to receiving a first control signal from the controller;
an analogue processing stage arranged to receive the sample of the input voltage signal and a constant baseline reference voltage and selectively process the sample of the input voltage signal to provide an output voltage;
a transconductance stage configured to convert the output voltage to a compensation current and supply the compensation current to an input of the circuit stage; and
a change detector configured to monitor if the input voltage signal changes during a time interval around the sampling time, and if no change is detected in the input voltage signal during the time interval, the controller is further configured to transmit a second control signal to the analogue processing stage to control the analogue processing stage to process the sample of the input voltage signal,
wherein the change detector comprises a change detector stage arranged to receive a digital signal output from an energy discriminator, wherein the digital signal is generated by the energy discriminator in dependence on a comparison of a level of the input voltage signal with at least one threshold value, the change detector stage configured to monitor if the input voltage signal changes during a time interval around the sampling time based on the digital signal.
11. The baseline restorer circuit of claim 10 , wherein the change detector stage is configured to determine that the input voltage signal has changed during the time interval by detecting a change of state of the digital signal.
12. The baseline restorer circuit of claim 11 , wherein if the comparator determines that the sample of the input voltage signal is outside of the acceptable range of the constant baseline reference voltage, the controller is further configured to transmit the second control signal to the analogue processing stage to control the analogue processing stage to discard the sample of the input voltage signal.
13. The baseline restorer circuit of claim 12 , wherein the controller is further configured to:
count a number of samples of the input voltage signal that are discarded only due to the fourth control signal output by the comparator; and
if the counted number of samples exceeds a threshold, enter an operating mode in which the controller processes further samples of the input voltage signal in dependence on only the output signal of the change detector.
14. The baseline restorer circuit of claim 13 , wherein the controller is configured to exit said operating mode in response to the fourth control signal indicating that a predetermined number of samples of the input voltage signal are within the acceptable range of the constant baseline reference voltage.
15. The baseline restorer circuit of claim 11 , wherein the sample of the input voltage signal received by the comparator is the sample of the input voltage signal captured by the sample control circuit.
16. The baseline restorer circuit of claim 11 , wherein the sample of the input voltage signal received by the comparator is captured by a further sample control circuit, the further sample control circuit arranged to receive the input voltage signal that is output from the circuit stage.
17. The baseline restorer circuit of claim 11 , wherein the sample control circuit is arranged to receive the constant baseline reference voltage and is configured to capture a sample of the constant baseline reference voltage, wherein the comparator is arranged to receive the sample of the constant baseline reference voltage.
18. The baseline restorer circuit of 16 , wherein the further sample control circuit is arranged to receive the constant baseline reference voltage and is configured to capture a sample of the constant baseline reference voltage, wherein the comparator is arranged to receive the sample of the constant baseline reference voltage.
19. The baseline restorer circuit of claim 11 , wherein the comparator is configured to determine that the sample of the input voltage signal is within an acceptable range of the constant baseline reference voltage by at least one of:
detecting that the differential voltage value is greater than a third negative predetermined threshold voltage; and
detecting that the differential voltage value is less than a fourth positive predetermined threshold voltage.
20. A baseline restorer circuit, the baseline restorer circuit comprising:
a controller;
a sample control circuit arranged to receive an input voltage signal that is output from a circuit stage comprising an amplifier, wherein the sample control circuit is configured to capture a sample of the input voltage signal at a sampling time in response to receiving a first control signal from the controller;
an analogue processing stage arranged to receive the sample of the input voltage signal and a constant baseline reference voltage and selectively process the sample of the input voltage signal to provide an output voltage;
a transconductance stage configured to convert the output voltage to a compensation current and supply the compensation current to an input of the circuit stage;
a change detector configured to monitor if the input voltage signal changes during a time interval around the sampling time, and if no change is detected in the input voltage signal during the time interval, the controller is further configured to transmit a second control signal to the analogue processing stage to control the analogue processing stage to process the sample of the input voltage signal; and
a comparator arranged to receive a sample of the input voltage signal and the constant baseline reference voltage, the comparator configured to:
compare the sample of the input voltage signal to the constant baseline reference voltage to determine a differential voltage value; and
determine, using the differential voltage value, whether the sample of the input voltage signal is within an acceptable range of the constant baseline reference voltage; and
output a fourth control signal to the controller, the fourth control signal indicating whether the sample of the input voltage signal is within the acceptable range of the constant baseline reference voltage, wherein transmission of the second control signal to the analogue processing stage to control the analogue processing stage to process the sample of the input voltage signal is further based on the fourth control signal indicating that the sample of the input voltage signal is within the acceptable range of the constant baseline reference voltage.