Adaptive fill techniques for avoiding electromigration
Embodiments are for using adaptive fill techniques to avoid electromigration, thereby resulting in electromigration signoff. A wire segment failing to meet an electromigration current limit is determined on an integrated circuit (IC). Fill shapes are connected adjacent to the wire segment to cause the wire segment to meet the electromigration current limit. The fill shapes are non-functional shapes on the IC.
1. A method comprising:
determining a wire segment failing to meet an electromigration current limit on an integrated circuit (IC); and
connecting fill shapes adjacent to the wire segment to cause the wire segment to meet the electromigration current limit, the fill shapes being non-functional shapes on the IC;
wherein failing to meet the electromigration current limit comprises the wire segment requiring an electrical current that fails to achieve a temperature requirement associated with the electromigration current limit.
2. The method of claim 1 , wherein the wire segment couples to at least one active device on the IC.
3. The method of claim 1 , wherein the wire segment meets the electromigration current limit by having a temperature that achieves the temperature requirement associated with the electromigration current limit.
4. The method of claim 1 , wherein:
the wire segment is determined to have a first temperature without connecting the fill shapes, the first temperature failing to meet the electromigration current limit; and
the wire segment is determined to have a second temperature responsive to connecting the fill shapes, the second temperature being lower than the first temperature and meeting the electromigration current limit.
5. The method of claim 1 , wherein connecting the fill shapes adjacent to the wire segment to cause the wire segment to meet the electromigration current limit comprises shorting the fill shapes adjacent to the wire segment to one or more other non-functional fill shapes, the one or more other non-functional fill shapes not being adjacent to the wire segment.
6. The method of claim 1 , wherein connecting the fill shapes adjacent to the wire segment to cause the wire segment to meet the electromigration current limit comprises shorting the fill shapes adjacent to the wire segment to other non-functional fill shapes, the other non-functional fill shapes not being adjacent to the wire segment, the other non-functional fill shapes being coupled to a region of the IC having a lower temperature than an active region of the IC at which the wire segment is located.
7. The method of claim 1 , wherein connecting the fill shapes adjacent to the wire segment to cause the wire segment to meet the electromigration current limit comprises shorting the fill shapes adjacent to the wire segment and forming a via to connect the fill shapes having been shorted to another region of the IC.
8. The method of claim 1 , wherein connecting the fill shapes adjacent to the wire segment to cause the wire segment to meet the electromigration current limit comprises shorting the fill shapes adjacent to the wire segment and forming a via to connect the fill shapes having been shorted to at least one other non-functional fill shape, the at least one other non-functional fill shape being at level of the IC different from the fill shapes having been shorted.
9. The method of claim 1 , wherein the IC is a semiconductor structure comprising metallization layers, the fill shapes being formed on at least one of the metallization layers.
10. A method comprising:
providing a wire segment coupled to at least one active device on an integrated circuit (IC); and
connecting fill shapes adjacent to the wire segment to cause the wire segment to meet an electromigration current limit, the fill shapes being non-functional shapes on the IC;
wherein the wire segment meets the electromigration current limit by having a temperature that achieves a temperature requirement associated with the electromigration current limit.
11. The method of claim 10 , wherein the wire segment couples to the at least one active device on the IC.
12. The method of claim 10 , wherein:
the wire segment is determined to have a first temperature without connecting the fill shapes, the first temperature failing to meet the electromigration current limit; and
the wire segment is determined to have a second temperature responsive to connecting the fill shapes, the second temperature being lower than the first temperature and meeting the electromigration current limit.
13. The method of claim 10 , wherein connecting the fill shapes adjacent to the wire segment to cause the wire segment to meet the electromigration current limit comprises shorting the fill shapes adjacent to the wire segment to one or more other non-functional fill shapes, the one or more other non-functional fill shapes not being adjacent to the wire segment.
14. The method of claim 10 , wherein connecting the fill shapes adjacent to the wire segment to cause the wire segment to meet the electromigration current limit comprises shorting the fill shapes adjacent to the wire segment to other non-functional fill shapes, the other non-functional fill shapes not being adjacent to the wire segment, the other non-functional fill shapes being coupled to a region of the IC having a lower temperature than an active region of the IC at which the wire segment is located.
15. The method of claim 10 , wherein connecting the fill shapes adjacent to the wire segment to cause the wire segment to meet the electromigration current limit comprises shorting the fill shapes adjacent to the wire segment and forming a via to connect the fill shapes having been shorted to another region of the IC.
16. The method of claim 10 , wherein connecting the fill shapes adjacent to the wire segment to cause the wire segment to meet the electromigration current limit comprises shorting the fill shapes adjacent to the wire segment and forming a via to connect the fill shapes having been shorted to at least one other non-functional fill shape, the at least one other non-functional fill shape being at level of the IC different from the fill shapes having been shorted.