IP Library Granted Patent US 12,388,616
Granted Patent B2
US 12,388,616 · App. 18/169,467 · Granted Aug 12, 2025

Fault detection of differential fault attack in lattice based cryptography

Inventors: Markus Schoenauer (Vienna, AT); Melissa Azouaoui (Norderstedt, DE); Olivier Bronchain (Auderghem, BE); Tobias Schneider (Graz, AT); Christine van Vredendaal (Veldhoven, NL)
Assignee: NXP B.V.
H04L9/004H04L9/3093H04L9/3247
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Quick Facts
Patent No.
US 12,388,616
App. No.
18/169,467
Granted
Aug 12, 2025
Kind
B2
Abstract

A data processing system comprising instructions embodied in a non-transitory computer readable medium, the instructions for a fault detection in a digital signature algorithm in a processor, the instructions, including: computing vector z based on a secret nonce vector y, a first secret key vector s 1 , and a challenge polynomial c, wherein vectors z, y, and s 1 include l polynomials having n coefficients, wherein polynomial c has n coefficients, and wherein l and n are integers; computing a difference value between all of the coefficients of the polynomials in the vector z; computing a number of how many of the computed difference values are outside a specified value range; computing a digital signature for an input message; and rejecting the digital signature when the computed number is greater than a threshold value.

Claims (36)

1. A data processing system comprising instructions embodied in a non-transitory computer readable medium, the instructions for a fault detection in a digital signature algorithm in a processor, the instructions, comprising:

computing vector z based on a secret nonce vector y, a first secret key vector s_(1), and a challenge polynomial c, wherein each of the vector z, the secret nonce vector y, and the first secret key vector s_1 includes a number of polynomials l having a number coefficients n, wherein the challenge polynomial c has the number of coefficients n, and wherein the number of polynomials l and the number of coefficients n are integers;

computing a difference value between all of the n coefficients of the l polynomials in the vector z;

computing a number of how many of the computed difference values are outside a specified value range;

computing a digital signature for an input message; and

rejecting the digital signature when the computed number is greater than a threshold value.

2. The data processing system of claim 1 , further comprising accepting the digital signature when the computed number is not greater than the threshold value.

3. The data processing system of claim 1 , wherein the specified value range is [−2τη,2τη] where η∈{2,4} and τ∈{39,49,60}.

4. The data processing system of claim 1 , wherein the digital signature algorithm is Dilithium.

5. A data processing system comprising instructions embodied in a non-transitory computer readable medium, the instructions for a fault detection in a digital signature algorithm in a processor, the instructions, comprising:

computing vector z based on a secret nonce vector y, a first secret key vector s_1, and a challenge polynomial c, wherein each of the vector z, the secret nonce vector y, and the first secret key vector s_1 includes a number of polynomials l having a number of coefficients n, wherein the challenge polynomial c has the number of coefficients n, and wherein the number of polynomials l and the number of coefficients n are integers;

right shifting all of the n coefficients of the l polynomials in the vector z by a number of bits a wherein the number of bits a is an integer;

computing a number of the right shifted coefficients of the polynomials in the vector z that have a same value;

computing a digital signature for an input message; and

rejecting the digital signature when the computed number is greater than a threshold value.

6. The data processing system of claim 5 , further comprising accepting the digital signature when the computed number is not greater than the threshold value.

7. The data processing system of claim 5 , wherein the instructions cause the processor to perform a method comprising computing a number of how many of the computed difference values are outside a specified value range, the specified value range is [−2τη,2τη] where η∈{2,4} and τ∈{39,49,60}.

8. The data processing system of claim 5 , wherein the digital signature algorithm is Dilithium.

9. A fault detection method for a digital signature algorithm, comprising:

computing vector z based on a secret nonce vector y, a first secret key vector s_1, and a challenge polynomial c, wherein each of the vector z, the secret nonce vector y, and the first secret key vector s_1 include a number of polynomials l having a number of coefficients n, wherein the challenge polynomial c has the number of coefficients n, and wherein the number of polynomials l and the number of coefficients n are integers;

computing a difference value between all of the n coefficients of the l polynomials in the vector z;

computing a number of how many of the computed difference values are outside a specified value range;

computing a digital signature for an input message; and

rejecting the digital signature when the computed number is greater than a threshold value.

10. The method of claim 9 , further comprising accepting the digital signature when the computed number is not greater than the threshold value.

11. The method of claim 9 , wherein the specified value range is [−2τη,2τη] where η∈{2,4} and τ∈{39,49,60}.

12. The method of claim 9 , wherein the digital signature algorithm is Dilithium.

13. A fault detection method for a digital signature algorithm, comprising:

computing vector z based on a secret nonce vector y, a first secret key vector s_1, and a challenge polynomial c, wherein each of the vector z, the secret nonce vector y, and the first secret key vector s_1 includes a number of polynomials l having a number of coefficients n, wherein the challenge polynomial c has the number of coefficients n, and wherein the number of polynomials l and the number of coefficients n are integers;

right shifting all of the n coefficients of the l polynomials in the vector z by a number of bits a wherein the number of bits a is an integer;

computing a number of right shifted coefficients of the polynomials in the vector z that have a same value;

computing a digital signature for an input message; and

rejecting the digital signature when the computed number is greater than a threshold value.

14. The method of claim 13 , further comprising accepting the digital signature when the computed number is not greater than the threshold value.

15. The method of claim 13 , further comprising computing a number of how many of the computed difference values are outside a specified value range, wherein the specified value range is [−2τη,2τη] where η∈{2,4} and τ∈{39,49,60}.

16. The method of claim 13 , wherein the digital signature algorithm is Dilithium.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2023
From: SCHOENAUER, MARKUS; AZOUAOUI, MELISSA; BRONCHAIN, OLIVIER; SCHNEIDER, TOBIAS; VAN VREDENDAAL, CHRISTINE
To: NXP B.V
Reel/Frame 062708/0827 →
Continuity (1)
Related Publication 20240275576A1 · Aug 15, 2024
References Cited (25)
US 8826025B2 · Sakumoto · 2014 [cited by examiner]
US 8959355B2 · Sakumoto · 2015 [cited by examiner]
US 11799662B2 · Shahar · 2023 [cited by examiner]
US 20170214664A1 · Birgisson · 2017 [cited by examiner]
US 20190108109A1 · Ghosh · 2019 [cited by examiner]
US 20220029824A1 · Poeppelmann · 2022 [cited by applicant]
US 20220083439A1 · Ghosh · 2022 [cited by examiner]
US 20220131848A1 · Shiner · 2022 [cited by examiner]
US 20230188337A1 · Bert · 2023 [cited by examiner]
US 20230188366A1 · Steinmetz · 2023 [cited by examiner]
US 20240275576A1 · Schoenauer · 2024 [cited by examiner]
WO 2020162973A1 · 2020 [cited by applicant]
Prasanna Ravi et al.; “Side-channel and Fault-injection attacks over Lattice-based Post-quantum Schemes (Kyber, Dilithium): Survey and New Results”; Dec. 4, 2022; Paper 2022/737; IACR International Association for Crypt… [cited by applicant]
P.E. Beckmann and B.R. Musicus, Fast fault-tolerant digital convolution using a polynomial residue number system, IEEE Transactions on Signal Processing 41(1993), No. 7, 2300-2313. [cited by applicant]
Nina Bindel, Johannes Buchmann, and Juliane Krämer, Lattice-based signature schemes and their sensitivity to fault attacks, 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography, FDTC 2016, Santa Barbara, CA, U… [cited by applicant]
L. Ducas, Eike Kiltz, Tancrède Lepoint, Vadim Lyubashevsky, P. Schwabe, Gregor Seiler, and D. Stehle, Crystals-dilithium algorithm specifications and supporting documentation (version 3.1), 2021. [cited by applicant]
Thomas Espitau, Pierre-Alain Fouque, Benoît Gerard, and Mehdi Tibouchi, Loopabort faults on lattice-based fiat-shamir and hash-and-sign signatures, Selected Areas in Cryptography—SAC 2016—23rd International Conference, … [cited by applicant]
Leon Groot Bruinderink and Peter Pessl, Differential Fault Attacks on Deterministic Lattice Signatures, IACR Transactions on Cryptographic Hardware and Embedded Systems 2018 (2018), No. 3, 21-43. [cited by applicant]
Daniel Heinz and Thomas Pöppelmann, Combined fault and DPA protection for lattice-based cryptography, IACR Cryptol. ePrint Arch. (2021), 101, https://eprint.iacr.org/2021/101. [cited by applicant]
Saad Islam, Koksal Mus, Richa Singh, Patrick Schaumont, and Berk Sunar, Signature correction attack on dilithium signature scheme, arXiv (2022), https://arxiv.org/abs/2203.00637. [cited by applicant]
National Institute of Standards and Technology, Post-quantum cryptography standardization, https://csrc.nist.gov/Projects/Post-Quantum-Cryptography/Post-Quantum-Cryptography-Standardization. [cited by applicant]
Ausmita Sarker, Mehran Mozaffari Kermani, and Reza Azarderakhsh, Error detection architectures for ring polynomial multiplication and modular reduction of ring-lwe in □/p□[x]xn+1 benchmarked on asic, IEEE Transactions o… [cited by applicant]
Ausmita Sarker, Mehran Mozaffari-Kermani, and Reza Azarderakhsh, Hardware constructions for error detection of number-theoretic transform utilized in securecryptographic architectures, IEEE Transactions on Very Large Sc… [cited by applicant]
F. S. Vainstein, Low redundancy polynomial checks for numerical computation, Appl. Algebra Eng., Commun. Comput. 7 (1996), No. 6, 439-447. [cited by applicant]
Keita Xagawa, Akira Ito, Rel Ueno, Junko Takahashi, and Naofumi Homma, Faultinjection attacks against nist's post-quantum cryptography round 3 KEM candidates, Advances in Cryptology—ASIACRYPT 2021—27th International Con… [cited by applicant]