IP Library › Granted Patent US 12,389,730
Granted Patent B2
US 12,389,730 · App. 17/495,541 · Granted Aug 12, 2025

Integrated circuit device package

Inventors: Sreenivasan Kalyani Koduri (Allen, TX); Grimmett Dale Jacky (Prosper, TX)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H10H20/857H10F77/50H10F77/933H10H20/8506
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Quick Facts
Patent No.
US 12,389,730
App. No.
17/495,541
Granted
Aug 12, 2025
Kind
B2
Abstract

An example apparatus includes: an integrated circuit including a first surface and terminals; a package including: a housing around the integrated circuit, the housing exposing the first surface; and an electrical interconnect including a second surface and an opening, the second surface electrically coupled to the terminals, the second surface mechanically coupled to the housing, the opening configured to expose the first surface.

Claims (30)

1. An apparatus comprising:

an integrated circuit having a first surface and terminals on the first surface;

a housing at least partially laterally surrounding the integrated circuit, the housing exposing the first surface; and

an electrical interconnect having a second surface and an opening, the second surface electrically coupled to the terminals on the first surface of the integrated circuit, the second surface contacting the housing, the opening exposing the first surface.

2. The apparatus of claim 1 , wherein the integrated circuit comprises an optical device.

3. The apparatus of claim 1 , wherein the integrated circuit includes a conductive film between the first surface of the integrated circuit and the second surface of the electrical interconnect.

4. The apparatus of claim 1 , wherein the integrated circuit includes a plurality of terminals on the first surface.

5. The apparatus of claim 1 , wherein the housing includes a third surface contacting the second surface of the electrical interconnect.

6. The apparatus of claim 1 , wherein the electrical interconnect includes the opening to expose an optical interface on the first surface of the integrated circuit.

7. The apparatus of claim 1 , wherein the electrical interconnect includes a first plurality of terminals and a second plurality of terminals on the second surface.

8. The apparatus of claim 1 , wherein the electrical interconnect includes a third surface, the opening configured to extend from the second surface to the third surface.

9. An apparatus comprising:

a first integrated circuit having a first surface;

a housing at least partially laterally surrounding the first integrated circuit, the housing having a second surface;

an electrical interconnect having a third surface, the third surface electrically coupled to the first surface, the third surface contacting the second surface; and

a second integrated circuit having a fourth surface, the fourth surface on the second surface, the fourth surface electrically coupled to the third surface.

10. The apparatus of claim 9 , wherein the first integrated circuit is an optical device.

11. The apparatus of claim 9 , wherein the first integrated circuit includes a plurality of terminals on the first surface.

12. The apparatus of claim 9 , wherein the housing includes a fifth surface contacting to the third surface.

13. The apparatus of claim 9 , wherein the electrical interconnect includes a first plurality of terminals and a second plurality of terminals on the third surface.

14. The apparatus of claim 9 , wherein the second integrated circuit includes a plurality of terminals on the fourth surface.

15. An apparatus comprising:

an integrated circuit including a first surface and a second surface;

a stand-off including a first surface and a second surface; and

an electrical interconnect having a first surface and a second surface, the first surface contacting first surface of the stand-off, the second surface contacting the second surface of the stand-off, the electrical interconnect electrically coupled to the second surface of the integrated circuit and to the first surface of the electrical interconnect.

16. The apparatus of claim 15 , wherein the integrated circuit is an optical device.

17. The apparatus of claim 15 , wherein the first surface of the integrated circuit is coupled to the first surface of the electrical interconnect through adhesive.

18. The apparatus of claim 15 , wherein the integrated circuit includes a plurality of terminals on the second surface of the integrated circuit.

19. The apparatus of claim 15 , wherein the electrical interconnect includes a plurality of terminals on a third surface.

20. The apparatus of claim 15 , wherein the electrical interconnect includes a fourth surface further including a plurality of terminals.

Assignments (2)
NUNC PRO TUNC ASSIGNMENT Recorded Oct 31, 2025
From: KODURI, SREENIVASAN KALYANI; GRIMMETT, JACKY DALE
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 072748/0363 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2021
From: KODURI, SREENIVASAN KALYANI; JACKY, GRIMMETT DALE
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 057783/0489 →
Continuity (2)
Provisional Application 63087944 · Oct 6, 2020
Related Publication 20220109091A1 · Apr 7, 2022
References Cited (4)
US 8564702B2 · Takagi · 2013 [cited by examiner]
US 10678006B2 · Rosenberg · 2020 [cited by examiner]
US 20040201792A1 · Saitoh · 2004 [cited by examiner]
US 20180164409A1 · Chen · 2018 [cited by examiner]