IP Library Granted Patent US 12,402,372
Granted Patent B2
US 12,402,372 · App. 17/832,495 · Granted Aug 26, 2025

Insulating structures in semiconductor device

Inventors: Tzu-Ging Lin (Kaohsiung, TW); Chen-Yu Tai (Miaoli County, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H10D62/115H01L21/76224H10D30/031H10D30/6713H10D30/6735H10D30/6757H10D62/118H10D64/017
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Quick Facts
Patent No.
US 12,402,372
App. No.
17/832,495
Granted
Aug 26, 2025
Kind
B2
Abstract

The present disclosure describes a structure that provides insulation in a semiconductor device and a method for forming the structure. The structure includes a first isolation structure including a first isolation layer disposed on a substrate, a second isolation layer disposed on the first isolation layer, and a first high-k dielectric layer having a first height and disposed on the second isolation layer. The structure further includes a second isolation structure including a third isolation layer disposed on the substrate, a fourth isolation layer disposed on the third isolation layer, and a second high-k dielectric layer having a second height and disposed on the fourth isolation layer, where the second height is less than the first height. The structure further includes a gate structure disposed on the first isolation structure, and an insulating structure disposed adjacent to the gate structure and on the second isolation structure.

Claims (37)

1. A structure, comprising:

a first isolation structure comprising a first isolation layer disposed on a substrate, a second isolation layer disposed above the first isolation layer, and a first high-k dielectric layer having a first height and disposed on the second isolation layer;

a second isolation structure comprising a third isolation layer disposed on the substrate, a fourth isolation layer disposed above the third isolation layer, and a second high-k dielectric layer having a second height and disposed on the fourth isolation layer, wherein the second height is less than the first height;

a gate structure disposed on the first isolation structure; and

an insulating structure disposed adjacent to the gate structure and on the second isolation structure.

2. The structure of claim 1 , wherein the first and third isolation layers comprise an oxide liner, and wherein the second and fourth isolation layers comprise a silicon carbon nitride (SiCN) liner.

3. The structure of claim 1 , wherein the first and second high-k dielectric layers comprise hafnium5 oxide (HfO 2 ), titanium oxide (TiO 2 ), hafnium zirconium oxide (HfZrO), tantalum oxide (Ta 2 O 3 ), hafnium silicate (HfSiO 4 ), zirconium oxide (ZrO 2 ), lanthanum oxide (La 2 O 3 ), zirconium silicate (ZrSiO 2 ), and combinations thereof.

4. The structure of claim 1 , wherein a ratio between the first height of the first high-k dielectric layer and the second height of the second high-k dielectric layer is between about 1.5 and about 5.

5. The structure of claim 1 , wherein a top portion of the third isolation layer comprises a slanted sidewall, and wherein an angle between the slanted sidewall and a horizontal direction is between about 60° and about 85°.

6. The structure of claim 1 , wherein a portion of the substrate is interposed between the third isolation layer and the insulating structure, and wherein a height of the portion of the substrate measured from a bottom surface of the third isolation layer is between about 5 nm and about 20 nm.

7. The structure of claim 6 , wherein a ratio between the height of the portion of the substrate and a height of the second isolation structure is between about 0.025 and about 0.1.

8. The structure of claim 1 , wherein a bottom surface of the insulating structure is below a bottom surface of the third isolation layer.

9. The structure of claim 1 , wherein a top surface of the insulating structure and a top surface of the gate structure are substantially coplanar.

10. The structure of claim 1 , further comprising:

a fin structure disposed adjacent to the first isolation structure and on the substrate;

a nanostructured gate layer disposed on the fin structure;

a nanostructured channel layer disposed on the nanostructured gate layer; and

a source/drain (S/D) region disposed on a first portion of the fin structure, wherein the gate structure is disposed on a second portion of the fin structure.

11. A structure, comprising:

a fin structure disposed on a substrate;

a first isolation structure adjacent to the fin structure and comprising a first isolation layer disposed on the substrate, a second isolation layer disposed above the first isolation layer, and a high-k dielectric layer disposed on the second isolation layer;

a gate structure disposed on the fin structure and in contact with the high-k dielectric layer;

a second isolation structure comprising a third isolation layer disposed on the substrate and a fourth isolation layer disposed above the third isolation layer; and

an insulating structure disposed adjacent to the gate structure and in contact with the fourth isolation layer.

12. The structure of claim 11 , wherein a ratio between a height of the second isolation layer and a height of the fourth isolation layer is between about 1.2 and about 2.

13. The structure of claim 11 , wherein a top portion of the third isolation layer comprises a slanted sidewall, and wherein an angle between the slanted sidewall and a horizontal direction is between about 30° and about 55°.

14. The structure of claim 11 , wherein a portion of the substrate is interposed between the third isolation layer and the insulating structure, and wherein a height of the portion of the substrate measured from a bottom surface of the third isolation layer is between about 2 nm and about 15 nm.

15. The structure of claim 14 , wherein a ratio between the height of the portion of the substrate and a height of the first isolation structure is between about 0.02 and about 0.08.

16. The structure of claim 11 , wherein the insulating structure comprises a first width adjacent to the fourth isolation layer and a second width, less than the first width, adjacent to the third isolation layer.

17. A structure, comprising:

a first isolation structure comprising a first isolation layer disposed on a substrate, a second isolation layer disposed above the first isolation layer, and a first high-k dielectric layer having a first height and disposed on the second isolation layer;

a second isolation structure comprising a third isolation layer disposed on the substrate, a fourth isolation layer disposed above the third isolation layer, and a second high-k dielectric layer having a second height and disposed on the fourth isolation layer, wherein the second height is lower than the first height in a lateral direction;

a gate structure disposed on the first isolation structure; and

an insulating structure disposed adjacent to the gate structure and on the second isolation structure.

18. The structure of claim 17 , wherein the first and third isolation layers comprise an oxide liner, and wherein the second and fourth isolation layers comprise a silicon carbon nitride (SiCN) liner.

19. The structure of claim 17 , wherein the first and second high-k dielectric layers comprise hafnium oxide (HfO 2 ), titanium oxide (TiO 2 ), hafnium zirconium oxide (HfZrO), tantalum oxide (Ta 2 O 3 ), hafnium silicate (HfSiO 4 ), zirconium oxide (ZrO 2 ), lanthanum oxide (La 2 O 3 ), zirconium silicate (ZrSiO 2 ), and combinations thereof.

20. The structure of claim 17 , wherein a top portion of the third isolation layer comprises a slanted sidewall, and wherein an angle between the slanted sidewall and a horizontal direction is between about 60° and about 85°.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 61454 FRAME 614. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 22, 2025
From: LIN, TZU-GING; TAI, CHEN-YU
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 072167/0333 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2022
From: LIN, TZU-GING; TAI, CHEN-YU
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 061454/0614 →
Continuity (1)
Related Publication 20230395654A1 · Dec 7, 2023
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