IP Library Granted Patent US 12,406,840
Granted Patent B2
US 12,406,840 · App. 17/660,060 · Granted Sep 2, 2025

Semiconductor structure and forming method thereof

Inventor: Peimeng Wang (Hefei, CN)
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
H01L21/02065H01L21/31055H10B12/03
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Quick Facts
Patent No.
US 12,406,840
App. No.
17/660,060
Granted
Sep 2, 2025
Kind
B2
Abstract

The present application provides a semiconductor structure and a forming method thereof. The method of forming the semiconductor structure includes: forming a capacitor base, the capacitor base including a plurality of capacitor switching structures and an isolation layer located between adjacent capacitor switching structures and covering top surfaces of the capacitor switching structures; removing the isolation layer covering the top surfaces of the capacitor switching structures, and exposing the capacitor switching structures; oxidizing a surface of the capacitor base exposing the capacitor switching structures, and forming an oxide layer; and removing the oxide layer, and exposing the capacitor switching structures.

Claims (47)

1. A method of forming a semiconductor structure, comprising:

forming a capacitor base, the capacitor base comprising a plurality of capacitor switching structures and an isolation layer located between adjacent capacitor switching structures and covering top surfaces of the capacitor switching structures, wherein the isolation layer is made of a nitride material;

etching the isolation layer with a mixed gas of CF 4 , CHF 3 and O 2 as an etching gas to exposes the top surfaces of the capacitor switching structures, wherein particulate matters are adhered on the top surfaces of the capacitor switching structures and a surface of the isolation layer during etching the isolation layer;

oxidizing, with an O 2 plasma, the top surfaces of the capacitor switching structures, the surface of the isolation layer and the particulate matters to form an oxide layer on the top surfaces of the capacitor switching structures and the surface of the isolation layer; and

removing the oxide layer to expose the top surfaces of the capacitor switching structures.

2. The method of forming the semiconductor structure according to claim 1 , wherein the forming a capacitor base comprises:

providing a substrate, a plurality of capacitor contact regions being provided in the substrate;

forming the plurality of the capacitor switching structures on a surface of the substrate, the plurality of the capacitor switching structures being electrically connected to the plurality of the capacitor contact regions in one-to-one correspondence; and

forming the isolation layer filling gaps between the adjacent capacitor switching structures and covering the top surfaces of the capacitor switching structures.

3. The method of forming the semiconductor structure according to claim 1 , wherein a reaction temperature is 25° C.-300° C. when the O 2 plasma is used to oxidize the top surfaces of the capacitor switching structures, the surface of the isolation layer and the particulate matters.

4. The method of forming the semiconductor structure according to claim 1 , wherein oxidizing, with an O 2 plasma, the top surfaces of the capacitor switching structures, the surface of the isolation layer and the particulate matters to form an oxide layer on the top surfaces of the capacitor switching structures and the surface of the isolation layer comprises:

transmitting a mixed gas plasma comprising at least the O 2 plasma and an H 2 N 2 plasma to the top surfaces of the capacitor switching structures, the surface of the isolation layer.

5. The method of forming the semiconductor structure according to claim 4 , wherein the mixed gas plasma has a flow of 100 sccm-15,000 sccm, and a pressure of 10 mtorr-10,000 mtorr.

6. The method of forming the semiconductor structure according to claim 4 , wherein the transmitting a mixed gas plasma comprising at least the O 2 plasma and an H 2 N 2 plasma to the top surfaces of the capacitor switching structures, the surface of the isolation layer comprises:

ionizing, with a radio frequency power of 100 W-10,000 W, a mixed gas comprising O 2 and H 2 N 2 , and forming the mixed gas plasma; and

transmitting the mixed gas plasma to the top surfaces of the capacitor switching structures, the surface of the isolation layer.

7. The method of forming the semiconductor structure according to claim 1 , wherein the removing the oxide layer comprises:

removing the oxide layer with a wet etching process.

8. The method of forming the semiconductor structure according to claim 7 , wherein the capacitor switching structures are made of a metal material, and the removing the oxide layer with a wet etching process comprises:

removing the oxide layer with an alkaline solution as a wet etchant.

9. The method of forming the semiconductor structure according to claim 8 , wherein the removing the oxide layer with an alkaline solution as a wet etchant comprises:

removing the oxide layer with a mixed solution of NH 4 OH and H 2 O as the wet etchant.

10. The method of forming the semiconductor structure according to claim 9 , wherein a volume ratio of the NH 4 OH to the H 2 O in the wet etchant is (5:1)-(1,000:1).

11. The method of forming the semiconductor structure according to claim 1 , after the removing the oxide layer, further comprising:

drying the capacitor base.

12. The method of forming the semiconductor structure according to claim 11 , wherein the drying the capacitor base comprises:

purging the capacitor base with a mixed gas of nitrogen and isopropanol.

13. A method of forming a semiconductor structure, comprising:

forming a capacitor base, the capacitor base comprising a plurality of capacitor switching structures and an isolation layer located between adjacent capacitor switching structures and covering top surfaces of the capacitor switching structures, wherein the isolation layer is made of a nitride material;

etching the isolation layer with a mixed gas of CF 4 , CHF 3 and O 2 as an etching gas to exposes the top surfaces of the capacitor switching structures, wherein the top surfaces of the capacitor switching structures are flush with a top surface of the isolation layer, and particulate matters are adhered on the top surfaces of the capacitor switching structures and the top surface of the isolation layer during etching the isolation layer;

oxidizing, with an O 2 plasma, the top surfaces of the capacitor switching structures, the top surface of the isolation layer and the particulate matters to form an oxide layer on the top surfaces of the capacitor switching structures and the top surface of the isolation layer; and

removing the oxide layer to expose the top surfaces of the capacitor switching structures.

14. The method of forming the semiconductor structure according to claim 13 , wherein the forming a capacitor base comprises:

providing a substrate, a plurality of capacitor contact regions being provided in the substrate;

forming the plurality of the capacitor switching structures on a surface of the substrate, the plurality of the capacitor switching structures being electrically connected to the plurality of the capacitor contact regions in one-to-one correspondence; and

forming the isolation layer filling gaps between the adjacent capacitor switching structures and covering the top surfaces of the capacitor switching structures.

15. The method of forming the semiconductor structure according to claim 13 , wherein the removing the oxide layer comprises:

removing the oxide layer with a wet etching process.

16. The method of forming the semiconductor structure according to claim 15 , wherein the capacitor switching structures are made of a metal material, and the removing the oxide layer with a wet etching process comprises:

removing the oxide layer with an alkaline solution as a wet etchant.

17. The method of forming the semiconductor structure according to claim 16 , wherein the removing the oxide layer with an alkaline solution as a wet etchant comprises:

removing the oxide layer with a mixed solution of NH 4 OH and H 2 O as the wet etchant.

18. The method of forming the semiconductor structure according to claim 17 , wherein a volume ratio of the NH 4 OH to the H 2 O in the wet etchant is (5:1)-(1,000:1).

19. The method of forming the semiconductor structure according to claim 13 , after the removing the oxide layer, further comprising:

drying the capacitor base.

20. The method of forming the semiconductor structure according to claim 19 , wherein the drying the capacitor base comprises:

purging the capacitor base with a mixed gas of nitrogen and isopropanol.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2022
From: WANG, PEIMENG
To: CHANGXIN MEMORY TECHNOLOGIES, INC.
Reel/Frame 059665/0094 →
Priority Claims (1)
CN 202110890950.6 · Aug 4, 2021 · national
Continuity (2)
Continuation PCTCN2022076281 · Feb 15, 2022
Related Publication 20230041544A1 · Feb 9, 2023
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