Amplifier output stage with DC-shifting circuit for high-speed supply modulator
The present invention provides a linear amplifier including an amplifier stage, a DC-shifting stage, a compensation network and a power stage. The amplifier stage is configured to generate a first signal and a second signal. The DC-shifting stage is configured to adjust a DC voltage of the first signal and a DC voltage of the second signal to generate an adjusted first signal and an adjusted second signal. The compensation network is configured to generate a first driving signal and a second driving signal according to the first signal, the second signal, the adjusted first signal and the adjusted second signal. The power stage is configured to generate an output signal according to the first driving signal and the second driving signal.
1. A linear amplifier, comprising:
an amplifier stage, configured to generate a first signal and a second signal;
a DC-shifting stage, configured to adjust a DC voltage of the first signal and a DC voltage of the second signal to generate an adjusted first signal and an adjusted second signal;
a compensation network, configured to generate a first driving signal and a second driving signal according to the first signal, the second signal, the adjusted first signal and the adjusted second signal; and
a power stage, configured to generate an output signal according to the first driving signal and the second driving signal;
wherein the compensation network performs a high-pass filtering operation on the first signal, performs a low-pass filtering operation on the adjusted first signal, and combines a high-pass filtering result of the first signal and a low-pass filtering result of the adjusted first signal to generate the first driving signal.
2. The linear amplifier of claim 1 , wherein a DC voltage of the adjusted first signal is different from the DC voltage of the first signal, and a DC voltage of the adjusted second signal is different from the DC voltage of the second signal.
3. The linear amplifier of claim 2 , wherein the DC voltage of the adjusted first signal is higher than the DC voltage of the first signal, and the DC voltage of the adjusted second signal is lower than the DC voltage of the second signal.
4. The linear amplifier of claim 3 , wherein the compensation network generates the first driving signal according to the first signal and the adjusted first signal, and generates the second driving signal according to the second signal and the adjusted second signal; the power stage comprises a P-type transistor and an N-type transistor connected in series, and a gate electrode of the P-type transistor receives the first driving signal and a gate electrode of the N-type transistor receives the second driving signal to generate the output signal.
5. The linear amplifier of claim 1 , wherein the compensation network comprises a first feedforwad path to preserve an AC component of the first signal in the first driving signal, and the compensation network comprises a second feedforwad path to preserve an AC component of the second signal in the second driving signal.
6. The linear amplifier of claim 1 , wherein the amplifier stage is a class-AB amplifier stage.
7. The linear amplifier of claim 1 , wherein the linear amplifier is used in a supply modulator.
8. A linear amplifier, comprising:
an amplifier stage, configured to generate a first signal and a second signal;
a DC-shifting stage, configured to adjust a DC voltage of the first signal and a DC voltage of the second signal to generate an adjusted first signal and an adjusted second signal;
a compensation network, configured to generate a first driving signal and a second driving signal according to the first signal, the second signal, the adjusted first signal and the adjusted second signal; and
a power stage, configured to generate an output signal according to the first driving signal and the second driving signal;
wherein the compensation network performs a high-pass filtering operation on the second signal, performs a low-pass filtering operation on the adjusted second signal, and combines a high-pass filtering result of the second signal and a low-pass filtering result of the adjusted second signal to generate the second driving signal.
9. A linear amplifier, comprising:
an amplifier stage, configured to generate a first signal and a second signal;
a DC-shifting stage, configured to adjust a DC voltage of the first signal and a DC voltage of the second signal to generate an adjusted first signal and an adjusted second signal;
a compensation network, configured to generate a first driving signal and a second driving signal according to the first signal, the second signal, the adjusted first signal and the adjusted second signal; and
a power stage, configured to generate an output signal according to the first driving signal and the second driving signal;
wherein the compensation network comprises a first capacitor and a first resistor, a first node of the first capacitor is used to receive the first signal, a first node of the first resistor is used to receive the adjusted first signal, and a second node of the first capacitor is coupled to a second node of the first resistor; and the first driving signal is generated at the second node of the first capacitor or the second node of the first resistor.
10. A linear amplifier, comprising:
an amplifier stage, configured to generate a first signal and a second signal;
a DC-shifting stage, configured to adjust a DC voltage of the first signal and a DC voltage of the second signal to generate an adjusted first signal and an adjusted second signal;
a compensation network, configured to generate a first driving signal and a second driving signal according to the first signal, the second signal, the adjusted first signal and the adjusted second signal; and
a power stage, configured to generate an output signal according to the first driving signal and the second driving signal;
wherein the compensation network comprises a second capacitor and a second resistor, a first node of the second capacitor is used to receive the second signal, a first node of the second resistor is used to receive the adjusted second signal, and a second node of the second capacitor is coupled to a second node of the second resistor; and the second driving signal is generated at the second node of the second capacitor or the second node of the second resistor.