IP Library Granted Patent US 12,408,520
Granted Patent B2
US 12,408,520 · App. 18/626,030 · Granted Sep 2, 2025

Display device

Inventors: Junhyun Park (Yongin-si, KR); Hyeongseok Kim (Yongin-si, KR); Heejean Park (Yongin-si, KR); Sunhwa Lee (Yongin-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H10K59/126G09G3/3233G09G2300/0426G09G2300/0819G09G2300/0852G09G2310/08G09G2320/0233
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,408,520
App. No.
18/626,030
Granted
Sep 2, 2025
Kind
B2
Abstract

A display device includes: a display panel including a light emitting element and a pixel circuit unit connected to the light emitting element. The pixel circuit unit includes: a first transistor connected between a drive voltage line and the light emitting element and which operates depending on a potential of a first node; a second transistor connected between a data line and a second node; a first capacitor electrode connected to the first node; a second capacitor electrode connected to the second node and which faces the first capacitor electrode; a third capacitor electrode connected to the second node; a fourth capacitor electrode, which faces the third capacitor electrode and is connected to the drive voltage line; a bridge electrode, which connects the second capacitor electrode and the third capacitor electrode; and a shielding electrode, which overlaps the bridge electrode in a plan view.

Claims (37)

1. A display device comprising:

a display panel including a light emitting element and a pixel circuit unit connected to the light emitting element,

wherein the pixel circuit unit includes:

a first transistor connected between a drive voltage line and the light emitting element and configured to operate depending on a potential of a first node;

a second transistor connected between a data line and a second node;

a first capacitor electrode electrically connected to the first node;

a second capacitor electrode electrically connected to the second node and configured to face the first capacitor electrode to form a first capacitor with the first capacitor electrode;

a third capacitor electrode electrically connected to the second node;

a fourth capacitor electrode electrically connected to the drive voltage line and configured to face the third capacitor electrode to form a second capacitor with the third capacitor electrode;

a bridge electrode configured to electrically connect the second capacitor electrode and the third capacitor electrode; and

a shielding electrode disposed over the bridge electrode and configured to overlap the bridge electrode in a plan view.

2. The display device of claim 1 , wherein the bridge electrode and the shielding electrode are disposed on different layers from each other.

3. The display device of claim 2 , wherein the shielding electrode is electrically connected with the fourth capacitor electrode, and

wherein the shielding electrode and the drive voltage line are disposed on a same layer, and the shielding electrode extends from the drive voltage line.

4. The display device of claim 1 , wherein the bridge electrode is connected with the second capacitor electrode and the third capacitor electrode through contact holes.

5. The display device of claim 4 , wherein the shielding electrode is disposed to cover the contact holes in the plan view.

6. The display device of claim 1 , wherein the display panel further includes a connecting electrode configured to connect the drive voltage line and the fourth capacitor electrode.

7. The display device of claim 6 , wherein the bridge electrode and the connecting electrode are disposed on a same layer.

8. The display device of claim 1 , wherein the display panel includes an emissive region configured to overlap an emissive layer of the light emitting element and a non-emissive region adjacent to the emissive region, and

wherein the shielding electrode includes:

a first shielding electrode configured to overlap the emissive region; and

a second shielding electrode configured to overlap the non-emissive region.

9. The display device of claim 8 , wherein the second shielding electrode has a width less than a width of the first shielding electrode in the plan view.

10. The display device of claim 9 , wherein the second shielding electrode has an area less than an area of the first shielding electrode in the plan view.

11. The display device of claim 1 , wherein the first capacitor electrode and the third capacitor electrode are disposed on a same layer, and

wherein the second capacitor electrode and the fourth capacitor electrode are disposed on a same layer.

12. The display device of claim 11 , wherein the second capacitor electrode and the third capacitor electrode are disposed on different layers from each other.

13. The display device of claim 11 , wherein the first capacitor electrode and the third capacitor electrode do not overlap each other in the plan view, and

wherein the second capacitor electrode and the fourth capacitor electrode do not overlap each other in the plan view.

14. The display device of claim 1 , wherein the second capacitor electrode and the third capacitor electrode are disposed on the same layer and integrally provided with each other.

15. The display device of claim 14 , wherein the first capacitor electrode and the third capacitor electrode overlap each other in the plan view, and

wherein the second capacitor electrode and the fourth capacitor electrode overlap each other in the plan view.

16. The display device of claim 1 , wherein the pixel circuit unit further includes:

a third transistor connected between the first transistor and the first node; and

a fourth transistor connected between the first node and an initialization voltage line.

17. The display device of claim 16 , wherein the pixel circuit unit further includes a fifth transistor connected between the second node and a reference voltage line.

18. The display device of claim 16 , wherein the pixel circuit unit further includes a fifth transistor connected between the second node and the drive voltage line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 6, 2024
From: PARK, JUNHYUN; KIM, HYEONGSEOK; PARK, HEEJEAN; LEE, SUNHWA
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 067644/0139 →
Priority Claims (1)
KR 10-2023-0055594 · Apr 27, 2023 · national
Continuity (1)
Related Publication 20240365607A1 · Oct 31, 2024
References Cited (10)
US 11195893B2 · Lee et al. · 2021 [cited by applicant]
US 11574972B2 · Kang et al. · 2023 [cited by applicant]
US 20070273619A1 · Kitazawa · 2007 [cited by examiner]
US 20220052134A1 · Zhang · 2022 [cited by examiner]
US 20220320212A1 · Gui · 2022 [cited by examiner]
US 20220328592A1 · You · 2022 [cited by applicant]
US 20230081823A1 · Noh · 2023 [cited by examiner]
KR 1020210013460A · 2021 [cited by applicant]
KR 1020210029339A · 2021 [cited by applicant]
KR 1020220140920A · 2022 [cited by applicant]