IP Library Granted Patent US 12,413,195
Granted Patent B2
US 12,413,195 · App. 18/090,455 · Granted Sep 9, 2025

Gain-adjustable amplifier circuit

Inventors: Chih-Sheng Chen (Taipei, TW); Ching-Wen Hsu (Taipei, TW)
Assignee: RichWave Technology Corp.
H03G3/30H03F3/04H03F1/12H03F1/56H03G2201/103
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Quick Facts
Patent No.
US 12,413,195
App. No.
18/090,455
Granted
Sep 9, 2025
Kind
B2
Abstract

An amplifier circuit includes an amplifier for generating an amplified input signal according to an input signal, and an attenuator circuit coupled to the amplifier. The attenuator circuit includes an input terminal for receiving the input signal or the amplified input signal, an output terminal, a reference voltage terminal, a zeroth resistor-switch circuit, a first resistor-switch circuit, and a second resistor-switch circuit. The zeroth resistor-switch circuit includes a first terminal coupled to the input terminal, a second terminal coupled to the output terminal, a zeroth switch coupled to the first terminal of the zeroth resistor-switch circuit and the second terminal of the zeroth resistor-switch circuit, a zeroth resistor coupled between the first terminal of the zeroth resistor-switch circuit and the second terminal of the zeroth resistor-switch circuit, a first resistor coupled between the zeroth resistor and the second terminal of the zeroth resistor-switch circuit, and a first switch.

Claims (80)

1. An amplifier circuit comprising:

an amplifier configured to generate an amplified input signal according to an input signal; and

an attenuator circuit coupled to the amplifier, comprising:

an input terminal for receiving the input signal or the amplified input signal;

an output terminal;

a reference voltage terminal;

a zeroth resistor-switch circuit comprising:

a first terminal;

a second terminal, wherein the first terminal is coupled to the input terminal, and the second terminal is coupled to the output terminal; or the first terminal is coupled to the output terminal and the second terminal is coupled to the input terminal;

a zeroth switch coupled between the first terminal of the zeroth resistor-switch circuit and the second terminal of the zeroth resistor-switch circuit;

a zeroth resistor coupled between the first terminal of the zeroth resistor-switch circuit and the second terminal of the zeroth resistor-switch circuit;

a first resistor coupled between the zeroth resistor and the second terminal of the zeroth resistor-switch circuit; and

a first switch comprising:

a first terminal coupled to the zeroth resistor and the first resistor;

a second terminal coupled to the second terminal of the zeroth resistor-switch circuit; and

a control terminal;

a first resistor-switch circuit comprising:

a first terminal;

a second terminal, wherein the first terminal is coupled to the input terminal, and the second terminal is coupled to the reference voltage terminal; or the first terminal is coupled to the reference voltage terminal, and the second terminal is coupled to the input terminal;

a zeroth resistor coupled between the first terminal of the first resistor-switch circuit and the second terminal of the first resistor-switch circuit;

a first resistor coupled between the zeroth resistor and the second terminal of the first resistor-switch circuit; and

a first switch comprising:

a first terminal coupled to the zeroth resistor and the first resistor;

a second terminal coupled to the second terminal of the first resistor-switch circuit; and

a control terminal; and

a second resistor-switch circuit comprising:

a first terminal;

a second terminal, wherein the first terminal is coupled to the output terminal, and the second terminal is coupled to the reference voltage terminal; or the first terminal is coupled to the reference voltage terminal, and the second terminal is coupled to the output terminal;

a zeroth resistor coupled between the first terminal of the second resistor-switch circuit and the second terminal of the second resistor-switch circuit;

a first resistor coupled between the zeroth resistor and the second terminal of the second resistor-switch circuit; and

a first switch comprising:

a first terminal coupled to the zeroth resistor and the first resistor;

a second terminal coupled to the second terminal of the second resistor-switch circuit; and

a control terminal.

2. The amplifier circuit of claim 1 , wherein in a first mode, the attenuator circuit has a first attenuation and is configured to turn on the zeroth switch of the zeroth resistor-switch circuit and turn off the first switch of the zeroth resistor-switch circuit, the first switch of the first resistor-switch circuit and the first switch of the second resistor-switch circuit.

3. The amplifier circuit of claim 2 , wherein in a second mode, the attenuator circuit has a second attenuation and is configured to turn off the zeroth switch of the zeroth resistor-switch circuit and turn on the first switch of the zeroth resistor-switch circuit, the first switch of the first resistor-switch circuit and the first switch of the second resistor-switch circuit.

4. The amplifier circuit of claim 3 , wherein in a third mode, the attenuator circuit has a third attenuation and is configured to turn off the zeroth switch of the zeroth resistor-switch circuit and turn off the first switch of the zeroth resistor-switch circuit, the first switch of the first resistor-switch circuit and the first switch of the second resistor-switch circuit.

5. The amplifier circuit of claim 4 , wherein the third attenuation is greater than the second attenuation, and the second attenuation is greater than the first attenuation.

6. The amplifier circuit of claim 1 , wherein a difference between an impedance at the input terminal of the attenuator circuit and an impedance at the output terminal of the attenuator circuit is within ±10%.

7. The amplifier circuit of claim 1 , wherein:

the zeroth resistor-switch circuit further comprising:

a second resistor coupled between the first resistor and the second terminal of the zeroth resistor-switch circuit; and

a second switch comprising:

a first terminal coupled to the first resistor and the second resistor;

a second terminal coupled to the second terminal of the zeroth resistor-switch circuit; and

a control terminal;

the first resistor-switch circuit further comprising:

a second resistor coupled between the first resistor and the second terminal of the first resistor-switch circuit; and

a second switch comprising:

a first terminal coupled to the first resistor and the second resistor;

a second terminal coupled to the second terminal of the first resistor-switch circuit; and

a control terminal; and

the second resistor-switch circuit further comprising:

a second resistor coupled between the first resistor and the second terminal of the second resistor-switch circuit; and

a second switch comprising:

a first terminal coupled to the first resistor and the second resistor;

a second terminal coupled to the second terminal of the second resistor-switch circuit; and

a control terminal.

8. The amplifier circuit of claim 7 , wherein in a first mode, the attenuator circuit has a first attenuation and is configured to turn on the zeroth switch of the zeroth resistor-switch circuit, and turn off the first switch of the zeroth resistor-switch circuit, the first switch of the first resistor-switch circuit and the first switch of the second resistor-switch circuit, and turn off the second switch of the zeroth resistor-switch circuit, the second switch of the first resistor-switch circuit and the second switch of the second resistor-switch circuit.

9. The amplifier circuit of claim 8 , wherein in a second mode, the attenuator circuit has a second attenuation and is configured to turn off the zeroth switch of the zeroth resistor-switch circuit, and turn on the first switch of the zeroth resistor-switch circuit, the first switch of the first resistor-switch circuit and the first switch of the second resistor-switch circuit, and turn off the second switch of the zeroth resistor-switch circuit, the second switch of the first resistor-switch circuit and the second switch of the second resistor-switch circuit.

10. The amplifier circuit of claim 9 , wherein in a third mode, the attenuator circuit has a third attenuation and is configured to turn off the zeroth switch of the zeroth resistor-switch circuit, and turn off the first switch of the zeroth resistor-switch circuit, the first switch of the first resistor-switch circuit and the first switch of the second resistor-switch circuit, and turn on the second switch of the zeroth resistor-switch circuit, the second switch of the first resistor-switch circuit and the second switch of the second resistor-switch circuit.

11. The amplifier circuit of claim 10 , wherein in a fourth mode, the attenuator circuit has a fourth attenuation and is configured to turn off the zeroth switch of the zeroth resistor-switch circuit, and turn off the first switch of the zeroth resistor-switch circuit, the first switch of the first resistor-switch circuit and the first switch of the second resistor-switch circuit, and turn off the second switch of the zeroth resistor-switch circuit, the second switch of the first resistor-switch circuit and the second switch of the second resistor-switch circuit.

12. The amplifier circuit of claim 11 , wherein:

the fourth attenuation is greater than the third attenuation;

the third attenuation is greater than the second attenuation; and

the second attenuation is greater than the first attenuation.

13. The amplifier circuit of claim 7 further comprising a reference switch coupled between the first resistor-switch circuit, the second resistor-switch circuit and the reference voltage terminal.

14. The amplifier circuit of claim 13 further comprising a reference resistor coupled in series with the reference switch.

15. The amplifier circuit of claim 13 further comprising a reference resistor coupled in parallel with the reference switch.

16. The amplifier circuit of claim 7 , wherein a difference between an impedance at the input terminal of the attenuator circuit and an impedance at the output terminal of the attenuator circuit is within ±10%.

17. The amplifier circuit of claim 1 , wherein:

the first terminal of the zeroth resistor-switch circuit is coupled the input terminal;

the second terminal of the zeroth resistor-switch circuit is coupled to the output terminal;

the first terminal of the first resistor-switch circuit is coupled to the input terminal;

a second terminal of the first resistor-switch circuit is coupled to the reference voltage terminal;

the first terminal of the second resistor-switch circuit is coupled to the input terminal; and

a second terminal of the second resistor-switch circuit is coupled to the reference voltage terminal.

18. The amplifier circuit of claim 1 further comprising a reference switch coupled between the first resistor-switch circuit, the second resistor-switch circuit and the reference voltage terminal.

19. The amplifier circuit of claim 18 further comprising a reference resistor coupled in series with the reference switch.

20. The amplifier circuit of claim 18 further comprising a reference resistor coupled in parallel with the reference switch.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2022
From: CHEN, CHIH-SHENG; HSU, CHING-WEN
To: RICHWAVE TECHNOLOGY CORP.
Reel/Frame 062229/0654 →
Priority Claims (1)
TW 110127807 · Jul 29, 2021 · national
Continuity (3)
Continuation In Part 17499831 · Oct 12, 2021
Provisional Application 63294857 · Dec 30, 2021
Related Publication 20230163738A1 · May 25, 2023
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