IP Library › Granted Patent US 12,414,302
Granted Patent B2
US 12,414,302 · App. 18/065,335 · Granted Sep 9, 2025

Ferroelectric device

Inventors: Mihaela Ioana Popovici (Haasrode, BE); Jan Van Houdt (Bekkevoort, BE); Amey Mahadev Walke (Heverlee, BE); Gouri Sankar Kar (Leuven, BE); Jasper Bizindavyi (Leuven, BE)
Assignee: IMEC VZW
H10B51/00C23C16/45536H10D1/692H10D30/6755H10D86/421H10D86/60
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Quick Facts
Patent No.
US 12,414,302
App. No.
18/065,335
Granted
Sep 9, 2025
Kind
B2
Abstract

Example embodiments relate to ferroelectric devices. An example ferroelectric device layer structure includes a first electrode. The ferroelectric device layer structure also includes a second electrode. Additionally, the ferroelectric device layer structure includes a ferroelectric layer of hafnium zirconate (HZO). Further, the ferroelectric device layer structure includes an oxide layer of Nb 2 O 5 or Ta 2 O 5 arranged on the ferroelectric layer. The ferroelectric layer and the oxide layer are arranged between the first electrode and the second electrode.

Claims (56)

1. A ferroelectric device layer structure comprising:

a first electrode;

a second electrode;

a ferroelectric layer of hafnium zirconate (HZO); and

an oxide layer of Nb 2 O 5 or Ta 2 O 5 arranged on the ferroelectric layer,

wherein the ferroelectric layer and the oxide layer are arranged between the first electrode and the second electrode, and

wherein the ferroelectric layer and the oxide layer have an orthorhombic crystal structure:

producible by an annealing step performed at an annealing temperature in a range of 350° C.-750° C. if the oxide layer is made of Nb 2 O 5 ; and

producible by an annealing step performed at corresponding to an annealing temperature in a range of 350° C.-900° C. if the oxide layer is made of Ta 2 O 5 .

2. The ferroelectric device layer structure according to claim 1 , wherein at least 30% of the ferroelectric layer and the oxide layer have the orthorhombic crystal structure.

3. The ferroelectric device layer structure according to claim 1 , further comprising an interfacial layer between the oxide layer and the second electrode.

4. The ferroelectric device layer structure according to claim 1 , wherein the ferroelectric layer is a doped HZO layer.

5. The ferroelectric device layer structure according to claim 1 , wherein the oxide layer is between 0.5 nm and 3 nm thick.

6. A ferroelectric device comprising:

the ferroelectric device layer structure according to claim 1 ; and

a doped semiconductor substrate having a front side and a back side, wherein the ferroelectric device layer structure is arranged on the front side.

7. A method for fabricating a ferroelectric device, wherein the method comprises:

forming a ferroelectric device layer structure comprising:

a first electrode;

a second electrode;

a ferroelectric layer of hafnium zirconate (HZO); and

an oxide layer of Nb 2 O 5 or Ta 2 O 5 arranged on the ferroelectric layer,

wherein the ferroelectric layer and the oxide layer are arranged between the first electrode and the second electrode; and

annealing the layers of the ferroelectric device layer structure at a temperature in a range of 350° C.-750° C. if the oxide layer is made of Nb 2 O 5 and in a range of 350° C.-900° C. if the oxide layer is made of Ta 2 O 5 .

8. The method according to claim 7 , further comprising:

depositing additional metal on the second electrode after the annealing step; and

patterning the metal to form the second electrode.

9. The method according to claim 7 , wherein forming a ferroelectric device layer structure comprises:

depositing a metal for forming the first electrode on a front side of a semiconductor substrate;

depositing HZO for forming the ferroelectric layer on the first electrode;

depositing Nb 2 O 5 or Ta 2 O 5 for forming the oxide layer on the ferroelectric layer; and

depositing a metal for forming the second electrode.

10. The method according to claim 9 , further comprising forming an aluminum layer on a back side of the semiconductor substrate.

11. The method according to claim 9 , wherein the depositing steps use atomic layer deposition (ALD).

12. The method according to claim 11 , wherein the ALD is performed with a reactor temperature in a range of 150° C.-450° C.

13. The method according to claim 11 , wherein the ALD comprises plasma-enhanced ALD or thermal ALD.

14. A ferroelectric device formed according to a method comprising:

forming a ferroelectric device layer structure comprising:

a first electrode;

a second electrode;

a ferroelectric layer of hafnium zirconate (HZO); and

an oxide layer of Nb 2 O 5 or Ta 2 O 5 arranged on the ferroelectric layer,

wherein the ferroelectric layer and the oxide layer are arranged between the first electrode and the second electrode; and

annealing the layers of the ferroelectric device layer structure at a temperature in a range of 350° C.-750° C. if the oxide layer is made of Nb 2 O 5 and in a range of 350° C.-900° C. if the oxide layer is made of Ta 2 O 5 .

15. The ferroelectric device according to claim 14 , further comprising:

depositing additional metal on the second electrode after the annealing step; and

patterning the metal to form the second electrode.

16. The ferroelectric device according to claim 14 , wherein forming a ferroelectric device layer structure comprises:

depositing a metal for forming the first electrode on a front side of a semiconductor substrate;

depositing HZO for forming the ferroelectric layer on the first electrode;

depositing Nb 2 O 5 or Ta 2 O 5 for forming the oxide layer on the ferroelectric layer; and

depositing a metal for forming the second electrode.

17. The ferroelectric device according to claim 16 , further comprising forming an aluminum layer on a back side of the semiconductor substrate.

18. The ferroelectric device according to claim 16 , wherein the depositing steps use atomic layer deposition (ALD).

19. The ferroelectric device according to claim 18 , wherein the ALD is performed with a reactor temperature in a range of 150° C.-450° C.

20. The ferroelectric device according to claim 18 , wherein the ALD comprises plasma-enhanced ALD or thermal ALD.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 12, 2023
From: POPOVICI, MIHAELA IOANA; VAN HOUDT, JAN; WALKE, AMEY MAHADEV; KAR, GOURI SANKAR; BIZINDAVYI, JASPER
To: IMEC VZW
Reel/Frame 064878/0596 →
Priority Claims (1)
EP 21216277 · Dec 21, 2021 · regional
Continuity (1)
Related Publication 20230200078A1 · Jun 22, 2023
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