OLED display driver integrated circuit and display driving method
An OLED display driver integrated circuit and a display driving method are provided. The OLED display driver integrated circuit includes a timing control circuit. The timing control circuit is configured to receive an external vertical synchronization signal. The timing control circuit generates an internal vertical synchronization signal, and generates a first switching signal and a second switching signal according to the internal vertical synchronization signal. The timing control circuit determines whether to adjust a time point of a next pulse of the internal vertical synchronization signal according to a time point of the latest received pulse of the external vertical synchronization signal. The first switching signal and the second switching signal are output to an OLED display panel and utilized for controlling an emission control circuit disposed in the OLED display panel which is utilized for controlling an illuminating period of pixel units of the OLED display panel.
1. An organic light emitting diode (OLED) display driver integrated circuit, comprising:
a timing control circuit, configured to receive an external vertical synchronization signal, generate an internal vertical synchronization signal, and generate a first switching signal and a second switching signal according to the internal vertical synchronization signal,
wherein the timing control circuit determines whether to adjust a time point of a next pulse of the internal vertical synchronization signal according to a time point of the latest received pulse of the external vertical synchronization signal,
wherein the first switching signal and the second switching signal are output to an OLED display panel and utilized for controlling an emission control circuit disposed in the OLED display panel which is utilized for controlling an illuminating period of pixel units of the OLED display panel.
2. The OLED display driver integrated circuit according to claim 1 , wherein the timing control circuit comprises:
a counter, configured to count the number of lines between the latest pulse of the internal vertical synchronization signal and the latest received pulse of the external vertical synchronization signal to generate a count value;
a determination circuit, coupled to the counter, and configured to divide the count value by a clock duty and determine whether the count value is divisible by the clock duty, wherein the clock duty is represented by a preconfigured number of lines; and
a compensation circuit, coupled to the determination circuit, and configured to, in response to that the count value is not divisible by the clock duty, calculate a compensated vertical total line number which is divisible by the clock duty.
3. The OLED display driver integrated circuit according to claim 2 , wherein the compensated vertical total line number equals the count value plus a compensation value, and the compensation value equals a remainder of the count value divided by the clock duty.
4. The OLED display driver integrated circuit according to claim 2 , wherein the timing control circuit generates the next pulse of the internal vertical synchronization signal when a time period determined by the compensated vertical total line number elapses from the timing point of the latest pulse of the internal vertical synchronization signal.
5. The OLED display driver integrated circuit according to claim 1 , wherein in response to determining to adjust the time point of the next pulse of the internal vertical synchronization signal, the timing control circuit generates the next pulse of the internal vertical synchronization signal when a time period determined by a compensated vertical total line number elapses from the timing point of the latest pulse of the internal vertical synchronization signal, wherein the compensated vertical total line number is an integer multiple of a clock duty.
6. The OLED display driver integrated circuit according to claim 1 , wherein in response to determining not to adjust the time point of the next pulse of the internal vertical synchronization signal, the timing control circuit generates the next pulse of the internal vertical synchronization signal when a time period determined by an original vertical total line number elapses from the timing point of the latest pulse of the internal vertical synchronization signal.
7. The OLED display driver integrated circuit according to claim 1 , wherein the emission control circuit comprises:
a pull-up control circuit, coupled to the OLED display driver integrated circuit, and configured to receive the first switching signal;
a pull-down control circuit, coupled to the OLED display driver integrated circuit, and configured to receive the second switching signal;
a pull-up transistor, coupled to the pull-up control circuit and an output node; and
a pull-down transistor, coupled to the pull-down control circuit and the output node,
wherein the output node is further coupled to the pixel unit, and configured to output the emission signal to the pixel unit.
8. A display driving method for an organic light emitting diode (OLED) display driver integrated circuit, comprising:
receiving an external vertical synchronization signal and generating an internal vertical synchronization signal by a timing control circuit in the OLED display driver integrated circuit;
generating a first switching signal and a second switching signal according to the internal vertical synchronization signal by the timing control circuit;
determining whether to adjust a time point of a next pulse of the internal vertical synchronization signal according to a time point of the latest received pulse of the external vertical synchronization signal by the timing control circuit; and
outputting the first switching signal and the second switching signal to an OLED display panel to control an emission control circuit disposed in the OLED display panel which is utilized for controlling an illuminating period of pixel units of the OLED display panel.
9. The display driving method according to claim 8 , wherein the step of determining whether to adjust the time point of the next pulse of the internal vertical synchronization signal comprises:
counting the number of lines between the latest pulse of the internal vertical synchronization signal and the latest received pulse of the external vertical synchronization signal to generate a count value by a counter;
dividing the count value by a clock duty and determine whether the count value is divisible by the clock duty by a determination circuit, wherein the clock duty is represented by a preconfigured number of lines; and
in response to that the count value is not divisible by the clock duty, calculating a compensated vertical total line number which is divisible by the clock duty by a compensation circuit.
10. The display driving method according to claim 9 , wherein the time period determined by the compensated vertical total line number equals the count value plus a compensation value, and the compensation value equals the clock duty minus a remainder of the count value divided by the clock duty.
11. The display driving method according to claim 9 , further comprising:
generating the next pulse of the internal vertical synchronization signal by the timing control circuit when the time period determined by the compensated vertical total line number elapses from the timing point of the latest pulse of the internal vertical synchronization signal.
12. The display driving method according to claim 8 , further comprising:
in response to determining to adjust the time point of the next pulse of the internal vertical synchronization signal, generating the next pulse of the internal vertical synchronization signal by the timing control circuit when a time period determined by a compensated vertical total line number elapses from the timing point of the latest pulse of the internal vertical synchronization signal,
wherein the compensated vertical total line number is an integer multiple of a clock duty.
13. The display driving method according to claim 8 , further comprising:
in response to determining not to adjust the time point of the next pulse of the internal vertical synchronization signal, generating the next pulse of the internal vertical synchronization signal by the timing control circuit when a time period determined by an original vertical total line number elapses from the timing point of the latest pulse of the internal vertical synchronization signal.
14. The display driving method according to claim 8 , wherein the emission control circuit comprises:
a pull-up control circuit, coupled to the OLED display driver integrated circuit, and configured to receive the first switching signal;
a pull-down control circuit, coupled to the OLED display driver integrated circuit, and configured to receive the second switching signal;
a pull-up transistor, coupled to the pull-up control circuit and an output node; and
a pull-down transistor, coupled to the pull-down control circuit and the output node,
wherein the output node is further coupled to the pixel unit, and configured to output the emission signal to the pixel unit.