Semiconductor device and method for fabricating the same
A method for fabricating a semiconductor device includes the steps of forming an inter-metal dielectric (IMD) layer on a substrate, forming a trench in the IMD layer, forming a barrier layer in the trench, forming a nucleation layer on the barrier layer, performing an anneal process to form a silicide layer, forming a bulk layer on the silicide layer, and forming a magnetic tunneling junction (MTJ) on the bulk layer.
1. A method for fabricating a semiconductor device, comprising:
forming an inter-metal dielectric (IMD) layer on a substrate;
forming a trench in the IMD layer;
forming a barrier layer in the trench;
forming a nucleation layer on the barrier layer;
performing an anneal process to crystallize a part of the nucleation layer for forming a silicide layer without enabling the nucleation layer to react with the barrier layer disposed thereunder, wherein the barrier layer, the silicide layer and another part of the nucleation layer are sequentially distributed in the trench;
forming a bulk layer on the silicide layer; and
forming a magnetic tunneling junction (MTJ) on the bulk layer.
2. The method of claim 1 , further comprising:
planarizing the bulk layer, the silicide layer, and the barrier layer to form a metal interconnection in the IMD layer; and
forming the MTJ on the metal interconnection.
3. The method of claim 1 , wherein a temperature of the anneal process is between 600-700° C.
4. The method of claim 1 , wherein a duration of the anneal process is between 20 seconds to 20 minutes.
5. The method of claim 1 , wherein the nucleation layer and the bulk layer comprises same material.
6. The method of claim 1 , wherein the nucleation layer comprises tungsten (W).
7. The method of claim 1 , wherein the bulk layer comprises tungsten (W).
8. A semiconductor device, comprising:
an inter-metal dielectric (IMD) layer on a substrate;
a metal interconnection in a trench of the IMD layer, wherein the metal interconnection comprises:
a barrier layer;
a silicide layer on top of the barrier layer;
a nucleation layer on the silicide layer; and
a bulk layer on the nucleation layer,
wherein the silicide layer is spaced from the substrate by the barrier layer; and
a magnetic tunneling junction (MTJ) on the metal interconnection.
9. The semiconductor device of claim 8 , wherein the nucleation layer and the bulk layer comprises same material.
10. The semiconductor device of claim 8 , wherein the nucleation layer comprises tungsten (W).
11. The semiconductor device of claim 8 , wherein the bulk layer comprises tungsten (W).