Imaging device and electronic apparatus
The present disclosure provides an imaging device capable of suppressing, when an analog pixel signal is compared with a predetermined reference signal, an error in inversion timing of the comparison result. The imaging device according to the present disclosure includes: a load current source; a comparator that is provided between a signal line for transmitting an analog pixel signal read from a pixel and the load current source and compares the analog pixel signal with a predetermined reference signal; and a negative capacitance circuit connected to the signal line. The load current source has two cascode-connected transistors. The negative capacitance circuit applies a voltage of the signal line to a common connection node of the two transistors of the load current source via a capacitive element without logic inversion.
1. An imaging device comprising:
a load current source;
a comparator that is provided between a signal line for transmitting an analog pixel signal read from a pixel and the load current source and compares the analog pixel signal with a predetermined reference signal; and
a negative capacitance circuit connected to the signal line, wherein
the load current source includes two cascode-connected transistors, and
the negative capacitance circuit applies a voltage of the signal line to a common connection node of the two transistors of the load current source via a capacitive element without logic inversion.
2. The imaging device according to claim 1 , wherein
the load current source includes an input-side load current source and an output-side load current source, and
the comparator includes:
an input transistor connected between the signal line and the input-side load current source and having a predetermined reference signal as a gate input; and
an output transistor connected between the signal line and the output-side load current source and having an output of the input transistor as a gate input.
3. The imaging device according to claim 2 , wherein the negative capacitance circuit applies the voltage of the signal line to a common connection node of two cascode-connected transistors of the input-side load current source via the capacitive element without logic inversion.
4. The imaging device according to claim 2 , wherein the negative capacitance circuit applies the voltage of the signal line to a common connection node of two cascode-connected transistors of the output-side load current source via the capacitive element without logic inversion.
5. The imaging device according to claim 2 , wherein the negative capacitance circuit applies the voltage of the signal line to a common connection node of two cascode-connected transistors of the input-side load current source and a common connection node of two cascode-connected transistors of the output-side load current source via the capacitive element without logic inversion.
6. The imaging device according to claim 2 , wherein
a load current source for signal line having two cascode-connected transistors is connected to the signal line, and
the negative capacitance circuit applies the voltage of the signal line to a common connection node of the two cascode-connected transistors of the load current source for signal line via the capacitive element without logic inversion.
7. The imaging device according to claim 6 , further comprising:
a first adjustment unit that adjusts bias voltages of the two cascode-connected transistors of the input-side load current source and bias voltages of the two cascode-connected transistors of the output-side load current source; and
a second adjustment unit that adjusts bias voltages of the two cascode-connected transistors of the load current source for signal line.
8. The imaging device according to claim 1 , wherein
the negative capacitance circuit includes a non-inverting amplifier having an input end connected to the signal line, and
another end of the non-inverting amplifier is connected to another end of the capacitive element that has one end connected to the common connection node of the two cascode-connected transistors of the load current source.
9. The imaging device according to claim 8 , wherein
the non-inverting amplifier includes: a transistor that is connected between a high-potential-side power supply and the other end of the capacitive element and that has a gate electrode connected to the signal line; and a current source connected between the other end of the capacitive element and a low-potential-side power supply.
10. The imaging device according to claim 9 , wherein
the negative capacitance circuit includes a clamp transistor connected in parallel to the transistor constituting the non-inverting amplifier.
11. An electronic apparatus, comprising:
an imaging device that includes:
a load current source;
a comparator that is provided between a signal line for transmitting an analog pixel signal read from a pixel and the load current source and compares the analog pixel signal with a predetermined reference signal; and
a negative capacitance circuit connected to the signal line, wherein
the load current source includes two cascode-connected transistors, and
the negative capacitance circuit applies a voltage of the signal line to a common connection node of the two transistors of the load current source via a capacitive element without logic inversion.