Regulated charge pump with adaptive drive strength
A regulated charge pump includes a comparator having a first input coupled to an output of the regulated charge pump, a second input configured for receiving a reference voltage, and an output for generating an output voltage representing a difference between a charging current of the regulated charge pump and a load current of a load coupled to the output of the regulated charge pump; a first converter having an input coupled to the output of the comparator, and an output connected to a control bus configured to indicate an adjustment of the charging current in response to the comparator output; and a driving stage having a first input coupled to the control bus, and an output for providing the charging current, wherein the output of the driving stage comprises the output of the regulated charge pump.
1. A regulated charge pump comprising:
an amplifier having first and second inputs, the second input configured to receive a reference voltage;
a clock generator having an input coupled to an output of the amplifier;
a first open-loop charge pump in a first feedback path having an input coupled to a first output of the clock generator, and an output coupled to the first input of the amplifier; and
a second open-loop charge pump in a second feedback path having an input coupled to a second output of the clock generator, and an output coupled to the first input of the amplifier,
wherein an output of the regulated charge pump comprises the output of the first open-loop charge pump and the output of the second open-loop charge pump, and wherein the first output of the clock generator is configured for providing a first clock signal having a first frequency, and wherein the second output of the clock generator is configured for providing a second clock signal having a second frequency different from the first frequency.
2. The regulated charge pump of claim 1 , further comprising a counter interposed between the second output of the clock generator and the input of the second open-loop charge pump.
3. The regulated charge pump of claim 2 , further comprising a plurality of toggle flip-flops interposed between an output of the counter and the input of the second open-loop charge pump.
4. The regulated charge pump of claim 1 , wherein the second open-loop charge pump comprises a plurality of individually selectable open-loop charge pumps.
5. The regulated charge pump of claim 1 , further comprising a voltage converter interposed between the output of the first open-loop charge pump and the first input of the amplifier.
6. The regulated charge pump of claim 1 , further comprising a voltage generator coupled to the second input of the amplifier.
7. The regulated charge pump of claim 2 , further comprising a logic gate having a first input coupled to an output of the counter, a second input coupled to the output of the amplifier, and an output coupled to a boost input of the amplifier.
8. The regulated charge pump of claim 7 , wherein the boost input of the amplifier is configured for changing a bias current of the amplifier.
9. The regulated charge pump of claim 7 , further comprising a delay element interposed between the output of the amplifier and the second input of the logic gate.
10. The regulated charge pump of claim 7 , wherein the logic gate comprises an OR gate.
11. An integrated circuit comprising:
a control interface coupled to a first plurality of integrated circuit pins;
a plurality of level shifters coupled to the control interface;
a plurality of radio frequency (RF) switches respectively coupled between the plurality of level shifters and a second plurality of integrated circuit pins; and
at least one regulated charge pump coupled to the plurality of level shifters, wherein the at least one regulated charge pump comprises:
an amplifier having first and second inputs, the second input configured to receive a reference voltage;
a clock generator having an input coupled to an output of the amplifier;
a first open-loop charge pump in a first feedback path having an input coupled to a first output of the clock generator, and an output coupled to the first input of the amplifier; and
a second open-loop charge pump in a second feedback path having an input coupled to a second output of the clock generator, and an output coupled to the first input of the amplifier,
wherein an output of the regulated charge pump comprises the output of the first open-loop charge pump and the output of the second open-loop charge pump, wherein the first output of the clock generator is configured for providing a first clock signal having a first frequency, and wherein the second output of the clock generator is configured for providing a second clock signal having a second frequency different from the first frequency.
12. The integrated circuit of claim 11 , wherein the at least one regulated charge pump further comprises a counter interposed between the second output of the clock generator and the input of the second open-loop charge pump.
13. The integrated circuit of claim 12 , wherein the at least one regulated charge pump further comprises a plurality of toggle flip-flops interposed between an output of the counter and the input of the second open-loop charge pump.
14. The integrated circuit of claim 11 , wherein the second open-loop charge pump of the at least one regulated charge pump comprises a plurality of individually selectable open-loop charge pumps.
15. The integrated circuit of claim 11 , wherein the at least one regulated charge pump further comprises a voltage converter interposed between the output of the first open-loop charge pump and the first input of the amplifier.
16. A method comprising:
amplifying a difference between a charge pump output voltage and a reference voltage to generate an enable signal;
generating a first clock signal and a second clock signal in response to the enable signal;
generating the charge pump output voltage with a first charge pump responsive to the first clock signal;
counting a number of periods of the second clock signal; and
boosting a driving strength of the first charge pump with a second charge pump, wherein a number of pumping stages of the second charge pump are enabled according to the number of periods that are counted.
17. The method of claim 16 , further comprising generating a boost signal during a boost mode of operation of the second charge pump.
18. The method of claim 17 , further comprising generating the boost signal when the enable signal is high or low for a time period greater than a predetermined delay time period.
19. The method of claim 17 , wherein the boost signal increases a speed of amplifying the difference between the charge pump output voltage and the reference voltage to generate the enable signal.
20. The method of claim 17 , wherein the boost signal increases a frequency of at least one of the first clock signal and the second clock signal.