IP Library › Granted Patent US 12,438,853
Granted Patent B2
US 12,438,853 · App. 18/601,629 · Granted Oct 7, 2025

Logic repository service using encrypted configuration data

Inventors: Islam Mohamed Hatem Abdulfattah Mohamed Atta (Vancouver, CA); Christopher Joseph Pettey (Cedar Park, TX); Nafea Bshara (San Jose, CA); Asif Khan (Cedar Park, TX); Mark Bradley Davis (Austin, AZ); Prateek Tandon (Issaquah, WA)
Assignee: Amazon Technologies, Inc.
H04L63/0428G06F9/50G06F15/7871H04L9/3247H04L2209/72
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Quick Facts
Patent No.
US 12,438,853
App. No.
18/601,629
Granted
Oct 7, 2025
Kind
B2
Abstract

The following description is directed to a logic repository service. In one example, a method of a logic repository service can include receiving a first request to generate configuration data for configurable hardware using a specification for application logic of the configurable hardware. The method can include generating the configuration data for the configurable hardware. The configuration data can include data for implementing the application logic. The method can include encrypting the configuration data to generate encrypted configuration data. The method can include signing the encrypted configuration data using a private key. The method can include transmitting the signed encrypted configuration data in response to the request.

Claims (22)

1. A method, comprising:

storing, by a compute service provider, configuration data including a hardware design, wherein the configuration data is configured to be programmed into a field-programmable gate array (FPGA) on a server computer;

receiving a request to launch a virtual machine instance in the compute service provider, wherein the request includes an identifier to the configuration data;

retrieving the configuration data in response to the request to launch the virtual machine instance; and

transmitting the configuration data to the server computer to configure the FPGA in conjunction with launching the virtual machine instance on the server computer.

2. The method of claim 1 , further including receiving a request to generate the configuration data, wherein the request includes fields for specifying metadata about the hardware design, user information and access privileges for the hardware design.

3. The method of claim 1 , further including encrypting the configuration data and storing an encrypted bitstream associated with the encrypted configuration data in a database.

4. The method of claim 3 , further comprising verifying, on the server computer, a signature of the encrypted bitstream using a public key.

5. The method of claim 1 , further including generating the configuration data comprising synthesizing the hardware design to generate a netlist compatible with the FPGA.

6. The method of claim 1 , wherein the request to launch the virtual machine instance includes a request for a particular central processing unit (CPU) to be executing in the server computer and in communication with the FPGA.

7. The method of claim 6 , further including host logic that controls bus transactions between the hardware design programmed into the FPGA and the CPU.

8. The method of claim 7 , further including executing verification tests to determine that the hardware design fits into the FPGA on the server computer and is compatible with the host logic.

9. The method of claim 1 , further including analyzing whether the hardware design includes prohibited logic functions.

10. The method of claim 9 , wherein a prohibited function includes a ring oscillator.

11. The method of claim 1 , wherein the configuration data includes host logic of the compute service provider integrated into the hardware design.

12. The method of claim 1 , wherein the hardware design is received from a user of the compute service provider.

13. The method of claim 1 , wherein the hardware design is received from a third-party developer.

14. The method of claim 1 , wherein the hardware design is received from a logic repository database of the compute service provider.

15. The method of claim 1 , wherein the FPGA is configured as a hardware accelerator.

16. The method of claim 15 , wherein the hardware accelerator is accessible via a Peripheral Component Interconnect Express interconnect.

17. The method of claim 1 , wherein the storing of the configuration data by the compute service provider is within a database.

18. The method of claim 17 , wherein the database is network-attached storage (NAS).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2024
From: ATTA, ISLAM MOHAMED HATEM ABDULFATTAH MOHAMED; PETTEY, CHRISTOPHER JOSEPH; BSHARA, NAFEA; KHAN, ASIF; DAVIS, MARK BRADLEY; TANDON, PRATEEK
To: AMAZON TECHNOLOGIES, INC.
Reel/Frame 068944/0260 →
Continuity (5)
Continuation 17518259 · Nov 3, 2021
Continuation 17017970 · Sep 11, 2020
Continuation 16287973 · Feb 27, 2019
Continuation 15280677 · Sep 29, 2016
Related Publication 20240259354A1 · Aug 1, 2024
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