IP Library Granted Patent US 12,439,689
Granted Patent B2
US 12,439,689 · App. 17/716,095 · Granted Oct 7, 2025

Display device

Inventor: Yoshitaka Ozeki (Tokyo, JP)
Assignee: Magnolia White Corporation
H10D86/60H10D86/423H10D86/443
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Quick Facts
Patent No.
US 12,439,689
App. No.
17/716,095
Granted
Oct 7, 2025
Kind
B2
Abstract

A display device includes a substrate, a first transistor including an oxide semiconductor layer, a first gate insulating layer, and a first gate electrode, the first transistor being provided in a display region, and a light-shielding layer provided between the substrate and the oxide semiconductor layer. The light-shielding layer includes a first light-shielding metal layer and a second light-shielding metal layer. The first light-shielding metal is provided between the substrate and the oxide semiconductor layer. The second light-shielding metal layer covers the top surface and side surface of the first light-shielding metal layer and faces the oxide semiconductor layer.

Claims (66)

1. A display device comprising:

a substrate;

a first transistor including an oxide semiconductor layer, a first gate insulating layer, and a first gate electrode, the first transistor being provided in a display region;

a light-shielding layer provided between the substrate and the oxide semiconductor layer; and

a second transistor including a second semiconductor layer, a second gate insulating layer, and a second gate electrode, the second transistor being provided in a peripheral region located around the display region, and the second semiconductor layer containing silicon, wherein

the light-shielding layer includes a first light-shielding metal layer and a second light-shielding metal layer,

the first light-shielding metal layer is provided between the substrate and the oxide semiconductor layer,

the second light-shielding metal layer covers the top surface and side surface of the first light-shielding metal layer and faces the oxide semiconductor layer, and

the second light-shielding metal layer and the second gate electrode are provided on a same layer.

2. The display system according to claim 1 , wherein

the first gate electrode extends from the display region to the peripheral region, and

the second gate electrode is connected to the first gate electrode at an edge of the display region.

3. The display system according to claim 1 , wherein

the thickness of the light-shielding layer is 100 nm or more.

4. The display system according to claim 1 , wherein

a width of the light-shielding layer is greater than a width of the first gate electrode.

5. The display system according to claim 1 , wherein

the first gate electrode and the light-shielding layer are electrically connected.

6. The display system according to claim 1 , wherein the first gate electrode extends in a first direction from the display region to the peripheral region, and includes a protruding portion protruding in a second direction intersecting the first direction at the periphery of the display region, a main line portion of the first gate electrode and the second gate electrode are separated from each other in the direction intersecting the extending direction, and the main line portion of the first gate electrode and the second gate electrode are connected to each other via the protruding portion of the first gate electrode.

7. The display system according to claim 1 , wherein

the first gate electrode extends in a first direction from the display region to the peripheral region,

at least one dummy transistor is provided between the oxide semiconductor layer and an edge of the first gate electrode, and the at least one dummy transistor is provided with an oxide semiconductor layer and a wiring overlapping the oxide semiconductor layer, and

the oxide semiconductor layer and the wiring intersect with the first gate electrode and are connected to each other at both edges of the oxide semiconductor layer and the wiring.

8. The display system according to claim 1 , wherein

the oxide semiconductor layer of the dummy transistor is formed in the same layer as the oxide semiconductor layer of the first transistor, and

the wiring is formed in an upper layer than the first gate electrode.

9. A display device comprising;

a substrate;

a first transistor including an oxide semiconductor layer, a first gate insulating layer, and a first gate electrode, the first transistor being provided in a display region;

a light-shielding layer provided between the substrate and the oxide semiconductor layer and overlapping the oxide semiconductor layer, and

a second transistor including a second semiconductor layer, a second gate insulating layer, and a second gate electrode, the second transistor being provided in a peripheral region located around the display region, and the second semiconductor layer containing silicon, wherein

a thickness of the light-shielding layer is greater than a thickness of the second gate electrode,

the first gate electrode extends in a first direction from the display region to the peripheral region, and

the second gate electrode is connected to the first gate electrode at an edge of the display region.

10. The display device according to claim 9 , wherein

the thickness of the light-shielding layer is twice or greater than the thickness of the second gate electrode.

11. The display system according to claim 9 , wherein

the light-shielding layer includes a first light-shielding metal layer and a second light-shielding metal layer that covers a top surface and a side surface of the first light-shielding metal layer.

12. The display system according to claim 9 , wherein

the thickness of the light-shielding layer is 100 nm or more.

13. The display system according to claim 9 , wherein

a width of the light-shielding layer is greater than a width of the first gate electrode.

14. The display system according to claim 9 , wherein

the first gate electrode and the light-shielding layer are electrically connected.

15. The display system according to claim 9 , wherein

the first gate electrode includes a protruding portion protruding in a second direction intersecting the first direction at the periphery of the display region,

a main line portion of the first gate electrode and the second gate electrode are separated from each other in the direction intersecting the extending direction, and

the main line portion of the first gate electrode and the second gate electrode are connected to each other via the protruding portion of the first gate electrode.

16. The display system according to claim 9 , wherein

at least one dummy transistor is provided between the oxide semiconductor layer and an edge of the first gate electrode, and the at least one dummy transistor is provided with an oxide semiconductor layer and a wiring overlapping the oxide semiconductor layer, and

the oxide semiconductor layer and the wiring intersect with the first gate electrode and are connected to each other at both edges of the oxide semiconductor layer and the wiring.

17. The display system according to claim 16 , wherein

the oxide semiconductor layer of the dummy transistor is formed in the same layer as the oxide semiconductor layer of the first transistor, and

the wiring is formed in an upper layer than the first gate electrode.

18. A display device comprising;

a substrate;

a first transistor including an oxide semiconductor layer, a first gate insulating layer, and a first gate electrode, the first transistor being provided in a display region;

a light-shielding layer provided between the substrate and the oxide semiconductor layer and overlapping the oxide semiconductor layer, and

a second transistor including a second semiconductor layer, a second gate insulating layer, and a second gate electrode, the second transistor being provided in a peripheral region located around the display region, and the second semiconductor layer containing silicon, wherein

a thickness of the light-shielding layer is greater than a thickness of the second gate electrode,

the first gate electrode extends in a first direction from the display region to the peripheral region,

at least one dummy transistor is provided between the oxide semiconductor layer and an edge of the first gate electrode, and the at least one dummy transistor is provided with an oxide semiconductor layer and a wiring overlapping the oxide semiconductor layer, and

the oxide semiconductor layer and the wiring intersect with the first gate electrode and are connected to each other at both edges of the oxide semiconductor layer and the wiring.

19. The display system according to claim 18 , wherein

the oxide semiconductor layer of the dummy transistor is formed in the same layer as the oxide semiconductor layer of the first transistor, and

the wiring is formed in an upper layer than the first gate electrode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 071602/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2022
From: OZEKI, YOSHITAKA
To: JAPAN DISPLAY INC.
Reel/Frame 059547/0231 →
Priority Claims (2)
JP 2021-066720 · Apr 9, 2021 · national
JP 2022-034757 · Mar 7, 2022 · national
Continuity (1)
Related Publication 20220328532A1 · Oct 13, 2022
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