IP Library › Granted Patent US 12,443,512
Granted Patent B2
US 12,443,512 · App. 18/334,246 · Granted Oct 14, 2025

Systems and methods for determining code coverage for GPU shader code

Inventors: Prem Kumar (Bangalore, IN); Shankar Kudimi (Bangalore, IN); Venkat Goriparthi (Hyderabad, IN); Pavan Kumar Desai (Bengaluru, IN); Aralakuppe Ramegowda Yogesha (Bangalore, IN)
Assignee: Honeywell International Inc.
G06F11/3676
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Quick Facts
Patent No.
US 12,443,512
App. No.
18/334,246
Granted
Oct 14, 2025
Kind
B2
Abstract

Systems and methods for determining code coverage for GPU shader code are provided herein. In one example, a method includes adding a flag for each line of shader code to be executed by a GPU. The method further includes creating at least one graphic object to be displayed on a display device for each line of shader code to be executed by the GPU. The method further includes receiving one or more hit files that include a status of one or more attributes of displayed graphic objects on the display device after execution of a requirements-based test. The method further includes generating a structural code coverage report for the shader code based on the one or more hit files and a mapping between the shader code and the displayed graphic objects.

Claims (42)

1. A method, comprising:

adding a flag for each line of shader code to be executed by a graphics processing unit (GPU);

creating at least one graphic object to be displayed on a display device for each line of shader code to be executed by the GPU;

receiving one or more hit files that include a status of one or more attributes of displayed graphic objects on the display device after execution of a requirements-based test; and

generating a structural code coverage report for the shader code based on the one or more hit files and a mapping between the shader code and the displayed graphic objects;

wherein adding a flag for each line of shader code to be executed by the GPU includes adding a flag for each statement and decision branch of the shader code to be executed by the GPU.

2. The method of claim 1 , wherein generating the structural code coverage report for the shader code is based on requirements for Design Assurance Level (DAL) A, DAL B, and/or DAL C.

3. The method of claim 1 , wherein the at least one graphic object to be displayed on the display device for a first line of shader code includes a first graphic object and a second graphic object, wherein the first graphic object corresponds to a first decision branch for the first line of shader code, wherein the second graphic object corresponds to a second decision branch for the first line of shader code.

4. The method of claim 1 , wherein the one or more attributes include a color, a shape, a size, and/or a pattern.

5. The method of claim 1 , further comprising displaying each graphic object using a respective pixel of the display device.

6. The method of claim 1 , further comprising changing an attribute of a respective displayed graphic object on the display device for a respective line of the shader code in response to the respective line of shader code being executed during the requirements-based test.

7. The method of claim 1 , further comprising receiving an input from a user indicating a level of structural code coverage required for the structural code coverage report.

8. The method of claim 7 , wherein adding the flag for each line of shader code to be executed by the GPU and creating the at least one graphic object to be displayed on the display device for each line of shader code to be executed by the GPU are based on the level of structural code coverage required for the structural code coverage report indicated by the input from the user.

9. A system, comprising:

one or more processors; and

a non-transitory, computer readable medium communicatively coupled to the one or more processors, wherein the non-transitory, computer readable medium stores one or more instructions which, when executed by the one or more processors, cause one or more processors to:

add a flag for each line of shader code to be executed by a graphics processing unit (GPU);

create at least one graphic object to be displayed on a display device for each line of shader code to be executed by the GPU;

receive one or more hit files that include a status of one or more attributes of displayed graphic objects on the display device after execution of a requirements-based test; and

generate a structural code coverage report for the shader code based the one or more hit files and a mapping between the shader code and the displayed graphic objects;

wherein adding the flag for each line of shader code to be executed by the GPU and creating at least one graphic object to be displayed on the display device for each line of shader code executed by the GPU are based on the level of structural code coverage required for the structural code coverage report indicated by the input from the user; and

wherein the at least one graphic object has a uniquely modified attribute.

10. The system of claim 9 , wherein the system is configured to output executable instrumented shader code to a target system for execution;

wherein the system is configured to receive the one or more hit files from the target system.

11. The system of claim 9 , wherein the one or more instructions, when executed by the one or more processors, further cause one or more processors to:

simulate hardware of a target system;

output executable instrumented shader code to the simulated hardware of the target system for execution;

wherein the system is configured to receive the one or more hit files from the simulated hardware of the target system.

12. The system of claim 9 , wherein the one or more instructions, when executed by the one or more processors, further cause one or more processors to add a flag for each statement and decision branch associated with each line of the shader code to be executed by the GPU;

wherein the at least one graphic object to be displayed on a display device for each line of shader code to be executed by the GPU includes a respective graphic object for each statement and decision branch associated with each line of the shader code to be executed by the GPU.

13. The system of claim 9 , wherein the system is configured to receive an input from a user indicating the level of structural code coverage required for the structural code coverage report.

14. The system of claim 9 , wherein the one or more instructions, when executed by the one or more processors, cause the one or more processors to generate the structural code coverage report for the shader code based on requirements for Design Assurance Level (DAL) A, DAL B, and/or DAL C.

15. A method, comprising:

receiving instrumented shader code to be executed by a graphics processing unit (GPU) and scripts of a requirements-based test, wherein the instrumented shader code includes one or more flags for each statement and decision branchline of the instrumented shader code to be executed by the GPU;

executing the scripts of the requirements-based test;

displaying a respective graphic object for each line of the instrumented shader code on a display device;

changing an attribute of a respective displayed graphic object for each respective line of the instrumented shader code in response to the respective line of the instrumented shader code being executed during the execution of the scripts of the requirements-based test; and

outputting one or more hit files in response to completion of the execution of the scripts of the requirements-based test, wherein the one or more hit files include a status of the attribute of each respective displayed graphic object for each respective line of the instrumented shader code.

16. The method of claim 15 , wherein the attribute includes a color, a shape, a size, and/or a pattern.

17. The method of claim 15 , wherein displaying the respective graphic object for each line of the instrumented shader code on the display device includes displaying the respective graphic object using a respective pixel of the display device.

18. The method of claim 15 , wherein the method comprises outputting the one or more hit files in response to completion of the execution of the scripts of the requirement-based test without storing the one or more hit files in a memory of the GPU.

19. The method of claim 15 , wherein changing the attribute of each respective displayed graphic object for each respective line of the instrumented shader code in response to the respective line of the instrumented shader code being executed during the execution of the scripts of the requirements-based test includes changing the attribute from a default state to a second state.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2023
From: KUMAR, PREM; KUDIMI, SHANKAR; GORIPARTHI, VENKAT; DESAI, PAVAN KUMAR; RAMEGOWDA, YOGESHA ARALAKUPPE
To: HONEYWELL INTERNATIONAL INC.
Reel/Frame 064041/0739 →
Priority Claims (1)
IN 202311029082 · Apr 21, 2023 · national
Continuity (1)
Related Publication 20240354232A1 · Oct 24, 2024
References Cited (24)
US 9292414B2 · Kiel · 2016 [cited by examiner]
US 9594544B2 · Wang et al. · 2017 [cited by applicant]
US 9875568B2 · Lorach · 2018 [cited by applicant]
US 11436783B2 · Baker et al. · 2022 [cited by applicant]
US 11455766B2 · Argade · 2022 [cited by examiner]
US 20090144698A1 · Fanning et al. · 2009 [cited by applicant]
US 20110090236A1 · Calsyn et al. · 2011 [cited by applicant]
US 20110214108A1 · Grunberg et al. · 2011 [cited by applicant]
US 20130106877A1 · Williams · 2013 [cited by applicant]
US 20140146062A1 · Kiel · 2014 [cited by examiner]
US 20140184616A1 · Gupta · 2014 [cited by examiner]
US 20140362093A1 · Lorach · 2014 [cited by examiner]
US 20170090886A1 · Munshi et al. · 2017 [cited by applicant]
US 20190108006A1 · Sandanagobalane · 2019 [cited by examiner]
US 20190362459A1 · Okubo · 2019 [cited by examiner]
US 20190369849A1 · Gonzalez et al. · 2019 [cited by applicant]
US 20210217221A1 · Fine et al. · 2021 [cited by applicant]
CN 110928610A · 2020 [cited by examiner]
CN 106997610B · 2020 [cited by applicant]
EP 2624135A2 · 2013 [cited by examiner]
WO 2013062956A1 · 2013 [cited by applicant]
NPL_Method, Device And Computer Storage Medium For Verifying Shader Function—CN 110928610 A (Year: 2020). [cited by examiner]
Aleman et al. “On the MC/DC Code Coverage of Vulkan SC GPU Code” 2022 IEEE/AIAA 41st Digital Avionics Systems Conference (DASC), Sep. 18, 2022, pp. 1 through 9. [cited by applicant]
European Patent Office, “Extended European Search Report”, dated Aug. 30, 2024, from U.S. Appl. No. 18/334,246, from Foreign Counterpart to U.S. Appl. No. 18/334,246, pp. 1 through 15, Published: EP. [cited by applicant]