IP Library › Granted Patent US 12,446,046
Granted Patent B2
US 12,446,046 · App. 17/819,420 · Granted Oct 14, 2025

Configuration information indication method and apparatus

Inventors: Chunxu Jiao (Shanghai, CN); Chao Li (Beijing, CN); Zhengzheng Xiang (Shanghai, CN); Lei Lu (Shanghai, CN)
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
H04W72/23H04L5/14
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Quick Facts
Patent No.
US 12,446,046
App. No.
17/819,420
Granted
Oct 14, 2025
Kind
B2
Abstract

This application provides a configuration information indication method and an apparatus, which are applicable to fields such as vehicle to everything V2X, intelligent connected vehicles, assisted driving, and intelligent driving, to resolve an existing-technology problem that SL transmission causes interference to DL transmission, and effectively reduce signaling overheads. This method is applied to a first terminal device, and includes: receiving an uplink-downlink time division multiplex TDD configuration sent by a network device; and sending indication information to a second terminal device based on the uplink-downlink TDD configuration, where the indication information is carried on a physical sidelink broadcast channel PSBCH of a sidelink synchronization signal block S-SSB, and the indication information is used to indicate periodicity information included in the uplink-downlink TDD configuration.

Claims (71)

1. A method, comprising:

receiving, by a first apparatus from a network device, an uplink-downlink time division duplex (TDD) configuration, wherein the uplink-downlink TDD configuration indicates a quantity of TDD patterns and a TDD pattern periodicity; and

sending, by the first apparatus to a second apparatus, indication information based on the uplink-downlink TDD configuration, wherein the indication information is a bit sequence with 12 bits, the bit sequence comprises a first bit sequence and a second bit sequence, wherein a first part of bits in the first bit sequence indicates the quantity of the TDD patterns is 1 or 2, wherein a second part of bits in the first bit sequence indicates an index corresponding to the TDD pattern periodicity of a TDD pattern or an index corresponding to a periodicity combination of two TDD patterns, the second bit sequence indicates uplink (UL) transmission duration in the TDD pattern periodicity of each of the TDD patterns, and wherein the first part of bits in the first bit sequence is 1 bit, the second part of bits in the first bit sequence is 4 bits, and the second bit sequence is 7 bits.

2. The method according to claim 1 , wherein the first part of bits in the first bit sequence indicates that the quantity of the TDD patterns is 1, wherein the TDD pattern is a pattern 1, wherein the index corresponding to the TDD pattern periodicity of the TDD pattern is an index corresponding to the periodicity of the pattern 1, and wherein the index has a relationship with the periodicity of the pattern 1 as follows:

the second part of bits in the first bit sequence indicates the index is 0, and the periodicity is 0.5 ms,

the second part of bits in the first bit sequence indicates the index is 1, and the periodicity is 0.625 ms,

the second part of bits in the first bit sequence indicates the index is 2, and the periodicity is 1 ms,

the second part of bits in the first bit sequence indicates the index is 3, and the periodicity is 1.25 ms,

the second part of bits in the first bit sequence indicates the index is 4, and the periodicity is 2 ms, and

the second part of bits in the first bit sequence indicates the index is 5, and the periodicity is 2.5 ms.

3. The method according to claim 1 , wherein

the first part of bits in the first bit sequence indicates that the quantity of the TDD patterns is 2, the TDD patterns are a pattern 1 and a pattern 2, and the index corresponding to the periodicity combination of the two TDD patterns is an index corresponding to a periodicity combination of a first periodicity P of the pattern 1 and a second periodicity P 2 of the pattern 2, and wherein the index has a relationship with the combination of the first periodicity P of the pattern 1 and the second periodicity P 2 of the pattern 2 as follows:

the index is 0, the first periodicity P is 0.5 ms, and the second periodicity P 2 is 0.5 ms,

the index is 1, the first periodicity P is 0.625 ms, and the second periodicity P 2 is 0.625 ms,

the index is 2, the first periodicity P is 1 ms, and the second periodicity P 2 is 1 ms,

the index is 3, the first periodicity P is 0.5 ms, and the second periodicity P 2 is 2 ms,

the index is 4, the first periodicity P is 1.25 ms and the second periodicity P 2 is 1.25 ms,

the index is 5, the first periodicity P is 2 ms, and the second periodicity P 2 is 0.5 ms,

the index is 6, the first periodicity P is 1 ms, and the second periodicity P 2 is 3 ms,

the index is 7, the first periodicity P is 2 ms, and the second periodicity P 2 is 2 ms,

the index is 8, the first periodicity P is 3 ms, and the second periodicity P 2 is 1 ms,

the index is 9, the first periodicity P is 1 ms, and the second periodicity P 2 is 4 ms,

the index is 10, the first periodicity P is 2 ms, and the second periodicity P 2 is 3 ms,

the index is 11, the first periodicity P is 2.5 ms, and the second periodicity P 2 is 2.5 ms,

the index is 12, the first periodicity P is 3 ms, and the second periodicity P 2 is 2 ms,

the index is 13, the first periodicity P is 4 ms, and the second periodicity P 2 is 1 ms,

the index is 14, the first periodicity P is 5 ms, and the second periodicity P 2 is 5 ms, and

the index is 15, the first periodicity P is 10 ms, and the second periodicity P 2 is 10 ms.

4. The method according to claim 1 , wherein a value 0 of the first part of bits indicates that the quantity of the TDD patterns is 1, and wherein a value 1 of the first part of bits indicates that the quantity of the TDD patterns is 2.

5. The method according to claim 1 ,

wherein the quantity of the TDD patterns comprised in the uplink-downlink TDD configuration is 1, and the second bit sequence is a binary representation of a quantity of slots that corresponds to the UL transmission duration, or

wherein the quantity of the TDD patterns comprised in the uplink-downlink TDD configuration is 2, and the second bit sequence indicates the quantity of slots that corresponds to the UL transmission duration in a corresponding periodicity of each of the TDD patterns.

6. The method according to claim 1 , wherein the indication information is carried on a physical sidelink broadcast channel (PSBCH) of a sidelink synchronization signal block (S-SSB), and wherein the UL transmission duration in the TDD pattern periodicity is related to a ratio of a subcarrier spacing (SCS) of the S-SSB to a reference SCS comprised in the uplink-downlink TDD configuration.

7. The method according to claim 6 , wherein the SCS of the S-SSB is an SCS configured on a sidelink bandwidth part (BWP).

8. The method according to claim 1 , wherein the indication information is carried on a physical sidelink broadcast channel (PSBCH) of a sidelink synchronization signal block (S-SSB).

9. An apparatus, comprising:

one or more processors, and

a non-transitory storage medium in communication with the one or more processors, wherein the non-transitory storage medium stores program instructions, and wherein, when executed by the one or more processors, the program instructions cause the apparatus to perform:

receiving, from a network device, an uplink-downlink time division duplex (TDD) configuration, wherein the uplink-downlink TDD configuration indicates a quantity of TDD patterns and a TDD pattern periodicity; and

sending, to a second apparatus, indication information based on the uplink-downlink TDD configuration, wherein the indication information is a bit sequence with 12 bits, the bit sequence comprises a first bit sequence and a second bit sequence, wherein a first part of bits in the first bit sequence indicates the quantity of the TDD patterns is 1 or 2, wherein a second part of bits in the first bit sequence indicates an index corresponding to the TDD pattern periodicity of a TDD pattern or an index corresponding to a periodicity combination of two TDD patterns, the second bit sequence indicates uplink (UL) transmission duration in the TDD pattern periodicity of each of the TDD patterns, and wherein the first part of bits in the first bit sequence is 1 bit, the second part of bits in the first bit sequence is 4 bits, and the second bit sequence is 7 bits.

10. The apparatus according to claim 9 , wherein the first part of bits in the first bit sequence indicates that the quantity of the TDD patterns is 1, wherein the TDD pattern is a pattern 1, wherein the index corresponding to the TDD pattern periodicity of the TDD pattern is an index corresponding to the periodicity of the pattern 1, and wherein the index has a relationship with the periodicity of the pattern 1 as follows:

the second part of bits in the first bit sequence indicates the index is 0, and the periodicity is 0.5 ms,

the second part of bits in the first bit sequence indicates the index is 1, and the periodicity is 0.625 ms,

the second part of bits in the first bit sequence indicates the index is 2, and the periodicity is 1 ms,

the second part of bits in the first bit sequence indicates the index is 3, and the periodicity is 1.25 ms,

the second part of bits in the first bit sequence indicates the index is 4, and the periodicity is 2 ms, and

the second part of bits in the first bit sequence indicates the index is 5, and the periodicity is 2.5 ms.

11. The apparatus according to claim 9 , wherein

the first part of bits in the first bit sequence indicates that the quantity of the TDD patterns is 2, the TDD patterns are a pattern 1 and a pattern 2, and the index corresponding to the periodicity combination of the two TDD patterns is an index corresponding to a periodicity combination of a first periodicity P of the pattern 1 and a second periodicity P 2 of the pattern 2, and wherein the index has a relationship with the combination of the first periodicity P of the pattern 1 and the second periodicity P 2 of the pattern 2 as follows:

the index is 0, the first periodicity P is 0.5 ms, and the second periodicity P 2 is 0.5 ms,

the index is 1, the first periodicity P is 0.625 ms, and the second periodicity P 2 is 0.625 ms,

the index is 2, the first periodicity P is 1 ms, and the second periodicity P 2 is 1 ms,

the index is 3, the first periodicity P is 0.5 ms, and the second periodicity P 2 is 2 ms,

the index is 4, the first periodicity P is 1.25 ms, and the second periodicity P 2 is 1.25 ms,

the index is 5, the first periodicity P is 2 ms, and the second periodicity P 2 is 0.5 ms,

the index is 6, the first periodicity P is 1 ms and the second periodicity P 2 is 3 ms,

the index is 7, the first periodicity P is 2 ms, and the second periodicity P 2 is 2 ms,

the index is 8, the first periodicity P is 3 ms, and the second periodicity P 2 is 1 ms,

the index is 9, the first periodicity P is 1 ms, and the second periodicity P 2 is 4 ms,

the index is 10, the first periodicity P is 2 ms, and the second periodicity P 2 is 3 ms,

the index is 11, the first periodicity P is 2.5 ms, and the second periodicity P 2 is 2.5 ms,

the index is 12, the first periodicity P is 3 ms, and the second periodicity P 2 is 2 ms,

the index is 13, the first periodicity P is 4 ms, and the second periodicity P 2 is 1 ms,

the index is 14, the first periodicity P is 5 ms, and the second periodicity P 2 is 5 ms, or

index is 15, the first periodicity P is 10 ms, and the second periodicity P 2 is 10 ms.

12. The apparatus according to claim 9 , wherein a value 0 of the first part of bits indicates that the quantity of the TDD patterns is 1, and wherein a value 1 of the first part of bits indicates that the quantity of the TDD patterns is 2.

13. The apparatus according to claim 9 , wherein the quantity of the TDD patterns comprised in the uplink-downlink TDD configuration is 1, and the second bit sequence is a binary representation of a quantity of slots that corresponds to the UL transmission duration, or

wherein the quantity of the TDD patterns comprised in the uplink-downlink TDD configuration is 2, and the second bit sequence indicates the quantity of slots that corresponds to the UL transmission duration in a corresponding periodicity of each of the TDD patterns.

14. The apparatus according to claim 9 , wherein the indication information is carried on a physical sidelink broadcast channel (PSBCH) of a sidelink synchronization signal block (S-SSB), and wherein the UL transmission duration in the TDD pattern periodicity is related to a ratio of a subcarrier spacing (SCS) of the S-SSB to a reference SCS comprised in the uplink-downlink TDD configuration.

15. The apparatus according to claim 14 , wherein the SCS of the S-SSB is an SCS configured on a sidelink bandwidth part (BWP).

16. The apparatus according to claim 9 , wherein the indication information is carried on a physical sidelink broadcast channel (PSBCH) of a sidelink synchronization signal block (S-SSB).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2025
From: JIAO, CHUNXU; LI, CHAO; XIANG, ZHENGZHENG; LU, LEI
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 070697/0808 →
Continuity (2)
Continuation PCTCN2020075430 · Feb 14, 2020
Related Publication 20220393846A1 · Dec 8, 2022
References Cited (35)
US 12126571B2 · Li · 2024 [cited by examiner]
US 20170230956A1 · Kim et al. · 2017 [cited by applicant]
US 20170303144A1 · Guo et al. · 2017 [cited by applicant]
US 20190373617A1 · Sun et al. · 2019 [cited by applicant]
US 20220046598A1 · Zhao · 2022 [cited by examiner]
US 20220124677A1 · Zhao · 2022 [cited by examiner]
US 20220191862A1 · Hwang · 2022 [cited by examiner]
US 20220286222A1 · Harada · 2022 [cited by examiner]
CN 107079508A · 2017 [cited by applicant]
CN 109478967A · 2019 [cited by applicant]
CN 110278610A · 2019 [cited by applicant]
CN 110536261A · 2019 [cited by applicant]
CN 110771235A · 2020 [cited by applicant]
EP 3522430A1 · 2019 [cited by applicant]
JP 2018509843A · 2018 [cited by applicant]
Huawei, et al., “Sideline synchronization mechanisms for NR V2X”, 3GPP TSG RAN WG1 Meeting #99, R1-1911885, Nov. 18-22, 2019, 24 Pages, Reno, USA. [cited by applicant]
Intel Corporation, “Synchronization Design for NR V2X Sidelink Communication”, 3GPP TSG RAN WG1 Meeting #97, R1-1906797, May 13-17, 2019, 17 Pages, Reno, USA. [cited by applicant]
VIVO, “Sidelink synchronization mechanism”, 3GPP TSG RAN WG1 Meeting #99, R1-1912024, Nov. 18-22, 2019, 19 Pages, Reno. USA. [cited by applicant]
“3rd Generation Partnership Project; Technical Specification Group Radio Access Network; NR; Physical channels and modulation (Release 16)”, 3GPP TS 38.211 V16.0.0, Technical Specification, Dec. 2019, 129 Pages. [cited by applicant]
“3rd Generation Partnership Project; Technical Specification Group Radio Access Network; NR; Physical layer procedures for control (Release 16)”, 3GPP TS 38.213 V16.0.0, Technical Specification, Dec. 2019, 146 Pages. [cited by applicant]
“3rd Generation Partnership Project; Technical Specification Group Radio Access Network; NR; User Equipment (UE) procedures in Idle mode and RRC Inactive state (Release 15)”, 3GPP TS 38.304 V15.6.0, Technical Specificat… [cited by applicant]
“3rd Generation Partnership Project; Technical Specification Group Radio Access Network; NR; Radio Resource Control (RRC) protocol specification (Release 15)”, 3GPP TS 38.331 V15.7.0, Technical Specification, Sep. 2019,… [cited by applicant]
CATT, “Design and evaluation of S-SSB for NR V2X Sidelink”, 3GPP TSG RAN WG1 Ad-Hoc Meeting 1901, R1-1900322, Jan. 21-25, 2019, 14 Pages, Taipei. [cited by applicant]
CATT, “Sidelink synchronization mechanism in NR V2X”, 3GPP TSG RAN WG1 Meeting #99, R1-1912156, Nov. 18-22, 2019, 15 Pages, Reno, USA. [cited by applicant]
Huawei, et al., “Sidelink synchronization mechanisms for NR V2X”, 3GPP TSG RAN WG1 Ad-Hoc Meeting 1901, R1-1900025, Jan. 21-25, 2019, 12 Pages, Taipei. [cited by applicant]
Huawei, et al., “Sidelink synchronization mechanisms for NR V2X”, 3GPP TSG RAN WG1 Meeting #97, R1-1906012, May 13-17, 2019, 13 Pages, Reno, USA. [cited by applicant]
Huawei, et al., “Sidelink synchronization mechanisms for NR V2X”, 3GPP TSG RAN WG1 Meeting #98bis, R1-1910057, Oct. 14-20, 2019, 27 Pages, Chongqing, China. [cited by applicant]
NTT Docomo, Inc., “Sidelink synchronization mechanism for Nr V2X”, 3GPP TSG RAN WG1 Ad-Hoc Meeting 1901, R1-1900964, Jan. 21-25, 2019, 5 Pages, Taipei. [cited by applicant]
OPPO, “Discussion of synchronization mechanism for NR-V2X”, 3GPP TSG RAN WG1 Ad-Hoc Meeting 1901, R1-1900302, Jan. 21-25, 2019, 4 Pages, Taipei. [cited by applicant]
Sharp, “Considerations on synchronization design for NR V2X”, 3GPP TSG RAN WG1 Ad-Hoc Meeting 1901, R1-1900832, Jan. 21-25, 2019, 4 Pages, Taipei, Taiwan. [cited by applicant]
Spreadtrum Communications, “Discussion on synchronization mechanism for NR V2X”, 3GPP TSG RAN WG1 Meeting #98bis, R1-1910008, Oct. 14-20, 2019, 10 Pages, Chongqing, China. [cited by applicant]
Spreadtrum Communications, Discussion on synchronization mechanisms for NR V2X, 3GPP TSG RAN WG1 Ad-Hoc Meeting 1901, R1-1900712, Jan. 21-25, 2019, 5 Pages, Taipei. [cited by applicant]
VIVO, “Sidelink synchronization mechanism”, 3GPP TSG RAN WG1 Meeting #99, R1-1912024, Nov. 18-22, 2019, 18 Pages, Reno, USA. [cited by applicant]
Spreadtrum Communications, Discussion on synchronization mechanism for NR V2X, 3GPP TSG RAN WG1 Meeting #99 R1-1912578, Reno, USA, Nov. 18-22, 2019, total 14 pages. [cited by applicant]
Huawei, HiSilicon, Remaining details of sidelink synchronization mechanisms, 3GPP TSG RAN WG1 Meeting #100-e R1-2000185, Feb. 24-Mar. 6, 2020, total 14 pages. [cited by applicant]