IP Library › Granted Patent US 12,451,456
Granted Patent B2
US 12,451,456 · App. 18/659,400 · Granted Oct 21, 2025

Semiconductor package including non-conductive film and method for forming the same

Inventors: Yeongbeom Ko (Cheonan-si, KR); Wooju Kim (Asan-si, KR); Heejae Nam (Asan-si, KR); Jungseok Ryu (Asan-si, KR); Haemin Park (Asan-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L24/32H01L25/0657H01L24/73H01L25/18H01L2224/32057H01L2224/32058H01L2224/32145H01L2224/73204H01L2225/06513H01L2924/10156
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Quick Facts
Patent No.
US 12,451,456
App. No.
18/659,400
Granted
Oct 21, 2025
Kind
B2
Abstract

A semiconductor package includes a semiconductor chip on a substrate. The semiconductor chip includes an active region, and a scribe lane in continuity with an edge of the active region. A non-conductive film (NCF) is between the substrate and the semiconductor chip, the non-conductive film (NCF) at least partially defines a recess region overlapping with the scribe lane in plan view and extending on the active region.

Claims (54)

1. A semiconductor package, comprising:

a substrate;

a semiconductor chip on the substrate, the semiconductor chip having a tilted side surface and including

an active region, and

a scribe lane in continuity with an edge of the active region; and

a non-conductive film (NCF) between the substrate and the semiconductor chip, overlapping the active region and a part of the scribe lane and not overlapping a remaining part of the scribe lane.

2. The semiconductor package according to claim 1 , wherein the non-conductive film (NCF) includes an upper surface in contact with the semiconductor chip, a lower surface in contact with the substrate, and a side surface between the upper surface and the lower surface, and the side surface has a convex portion.

3. The semiconductor package according to claim 2 , wherein the convex portion of the side surface of the non-conductive film (NCF) does not overlap the active region of the semiconductor chip.

4. The semiconductor package according to claim 2 , wherein the convex portion of the side surface of the non-conductive film (NCF) covers at least a portion of the tilted side surface of the semiconductor chip.

5. The semiconductor package according to claim 2 , wherein the convex portion of the side surface of the non-conductive film (NCF) covers a height of less than ½ of the tilted side surface of the semiconductor chip.

6. The semiconductor package according to claim 2 , wherein a maximum thickness of the convex portion of the side surface is greater than a thickness of a portion of the non-conductive film (NCF) disposed between the substrate and the active region of the semiconductor chip.

7. The semiconductor package according to claim 1 , wherein the non-conductive film (NCF) has a smaller horizontal width than a horizontal width of the semiconductor chip.

8. The semiconductor package according to claim 1 , wherein an area of the non-conductive film (NCF) is smaller than an area of an upper surface of the semiconductor chip and larger than an area of a lower surface of the semiconductor chip facing the non-conductive film (NCF).

9. The semiconductor package according to claim 8 , wherein a tilt angle formed by the upper surface of the semiconductor chip and the tilted side surface is about 45 degrees to about 89 degrees.

10. The semiconductor package according to claim 2 , further comprising:

a plurality of connecting members connected to the substrate and the semiconductor chip while extending within the non-conductive film (NCF).

11. The semiconductor package according to claim 10 , wherein the convex portion of the side surface is spaced apart from the plurality of connecting members.

12. The semiconductor package according to claim 10 , wherein each of the plurality of connecting members comprises a conductive bump, a conductive ball, a conductive pin, a conductive lead, a conductive pillar, or any combination thereof.

13. The semiconductor package according to claim 2 , further comprising:

an encapsulator on the substrate and covering the tilted side surface of the semiconductor chip,

wherein the encapsulator is in direct contact with the convex portion of the side surface of the non-conductive film (NCF).

14. The semiconductor package according to claim 13 , wherein at least a portion of the encapsulator overlaps with both a portion of the substrate and a portion of the scribe lane.

15. A semiconductor package, comprising:

a substrate;

semiconductor chips on the substrate, each of the semiconductor chips having a tilted side surface and including

an active region, and

a scribe lane in continuity with an edge of the active region;

non-conductive films (NCFs) among the semiconductor chips and between the substrate and the semiconductor chips; and

a plurality of connecting members among the semiconductor chips and between the substrate and the semiconductor chips, the plurality of connecting members being connected to the substrate and the semiconductor chips while extending in the non-conductive films (NCFs),

wherein each of the non-conductive films (NCFs) overlaps the active region of the semiconductor chips and a part of the scribe lane and does not overlap a remaining part of the scribe lane in plan view.

16. The semiconductor package according to claim 15 , wherein each of the non-conductive films (NCFs) includes

an upper surface in contact with one of the semiconductor chips,

a lower surface in contact with another one of the semiconductor chips or the substrate, and

a side surface between the upper surface and the lower surface, and the side surface has a convex portion.

17. The semiconductor package according to claim 16 , wherein the convex portion of the side surface of each of the non-conductive films (NCFs) does not overlap the active region of the semiconductor chips.

18. The semiconductor package according to claim 15 , wherein:

an upper surface of each of the semiconductor chips has a greater horizontal width than a lower surface of each of the semiconductor chips; and

a tilt angle formed by the upper surface and the tilted side surface of each of the semiconductor chips is about 45 degrees to about 89 degrees.

19. The semiconductor package according to claim 16 , further comprising:

an encapsulator on the substrate and covering the tilted side surface of each of the semiconductor chips,

wherein the encapsulator is in direct contact with the convex portion of the side surface of at least one of the non-conductive films (NCFs), and

wherein the encapsulator at least partially overlaps with both a portion of the substrate and at least a portion of the active region of the semiconductor chips.

20. A semiconductor package comprising:

a first substrate;

a first semiconductor package on the first substrate; and

a second semiconductor package on the first substrate and electrically connected to the first semiconductor package,

wherein the first semiconductor package includes

a second substrate,

semiconductor chips on the second substrate, each of the semiconductor chips including

an active region, and

a scribe lane in continuity with an edge of the active region, the scribe lane having a tilted side surface,

non-conductive films (NCFs) among the semiconductor chips and between the second substrate and the semiconductor chips, and

a plurality of connecting members among the semiconductor chips and between the second substrate and the semiconductor chips, the plurality of connecting members being connected to the second substrate and the semiconductor chips while extending in the non-conductive films (NCFs),

wherein each of the non-conductive films (NCFs) overlaps the active region of the semiconductor chips and a part of the scribe lane and does not overlap a remaining part of the scribe lane in plan view.

Priority Claims (1)
KR 10-2021-0083093 · Jun 25, 2021 · national
Continuity (2)
Continuation 17537994 · Nov 30, 2021
Related Publication 20240297141A1 · Sep 5, 2024
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