Stacked clip design for GaN half bridge IPM
An electronic device includes a substrate having first and second conductive traces, a semiconductor die having a transistor with a first terminal and a second terminal, and first and second metal clips. The first metal clip has a first end portion coupled to the first terminal of the transistor, and a second end portion coupled to the first conductive trace of the substrate. The second metal clip has a first end portion coupled to the second terminal of the transistor and a second end portion coupled to the second conductive trace of the substrate, and a middle portion of the second metal clip is spaced apart from and at least partially overlying a portion of the first metal clip.
1. An electronic device, comprising:
a substrate having first and second conductive traces;
a semiconductor die having a transistor with; a first terminal and a second terminal on a same side of the semiconductor die;
a first metal clip having first and second end portions and a middle portion that joins the first and second end portions of the first metal clip, the first end portion of the first metal clip coupled to the first terminal of the transistor, and the second end portion of the first metal clip coupled to the first conductive trace of the substrate; and
a second metal clip having first and second end portions and a middle portion that joins the first and second end portions of the second metal clip, the first end portion of the second metal clip coupled to the second terminal of the transistor, the second end portion of the second metal clip coupled to the second conductive trace of the substrate, and the middle portion of the second metal clip spaced apart from and at least partially overlying a portion of the first metal clip.
2. The electronic device of claim 1 , further comprising:
a second semiconductor die having a second transistor with a first terminal and a second terminal;
a third metal clip having first and second end portions and a middle portion that joins the first and second end portions of the third metal clip, the first end portion of the third metal clip coupled to the first terminal of the second transistor, and the second end portion of the third metal clip coupled to a third conductive trace of the substrate; and
a fourth metal clip having first and second end portions and a middle portion that joins the first and second end portions of the fourth metal clip, the first end portion of the fourth metal clip coupled to the second terminal of the second transistor, the second end portion of the fourth metal clip coupled to the first conductive trace of the substrate, and the middle portion of the fourth metal clip spaced apart from and at least partially overlying a portion of the third metal clip.
3. The electronic device of claim 2 , wherein:
a first transistor current of the transistor flows through the first and second metal clips in opposite respective first and second directions; and
a second transistor current of the second transistor flows through the third and fourth metal clips in opposite respective third and fourth directions.
4. The electronic device of claim 2 , wherein:
the first terminal of the transistor is a source terminal of the transistor;
the second terminal of the transistor is a drain terminal of the transistor;
the first terminal of the second transistor is a source terminal of the second transistor; and
the second terminal second transistor is a drain terminal of the second transistor.
5. The electronic device of claim 2 , wherein the transistor and the second transistor are gallium nitride transistors.
6. The electronic device of claim 2 , further comprising:
a circuit board; and
bond wires connecting conductive features of the circuit board to respective conductive features of the semiconductor die.
7. The electronic device of claim 1 , wherein a first transistor current of the transistor flows through the first and second metal clips in opposite respective first and second directions.
8. The electronic device of claim 2 , wherein:
the first terminal of the transistor is a source terminal of the transistor; and
the second terminal of the transistor is a drain terminal of the transistor.
9. The electronic device of claim 1 , wherein the transistor is a gallium nitride transistor.
10. The electronic device of claim 1 , further comprising:
a circuit board; and
bond wires connecting conductive features of the circuit board to respective conductive features of the semiconductor die.
11. The electronic device of claim 10 , further comprising:
a package structure that encloses the substrate, the semiconductor die, the first metal clip, the second metal clip, the circuit board, and the bond wires; and
conductive leads partially exposed outside the package structure.
12. A half-bridge circuit, comprising:
a first transistor with a first source and a first drain;
a second transistor with a second source and a second drain;
a first metal clip coupled between the first source and a switching node;
a second metal clip at least partially overlying a portion of the first metal clip and coupled between the first drain and a supply node;
a third metal clip coupled between the second source and a reference node; and
a fourth metal clip at least partially overlying a portion of the third metal clip and coupled between the second drain and the switching node.
13. The half-bridge circuit of claim 12 , wherein:
the first metal clip has first and second end portions and a middle portion that joins the first and second end portions of the first metal clip, the first end portion of the first metal clip coupled to the first source, and the second end portion of the first metal clip coupled to the switching node;
the second metal clip has first and second end portions and a middle portion that joins the first and second end portions of the second metal clip, the first end portion of the second metal clip coupled to the first drain, the second end portion of the second metal clip coupled to the supply node, and the middle portion of the second metal clip spaced apart from and at least partially overlying a portion of the first metal clip;
the third metal clip has first and second end portions and a middle portion that joins the first and second end portions of the third metal clip, the first end portion of the third metal clip coupled to the second source, and the second end portion of the third metal clip coupled to the reference node; and
the fourth metal clip has first and second end portions and a middle portion that joins the first and second end portions of the fourth metal clip, the first end portion of the fourth metal clip coupled to the second drain, the second end portion of the fourth metal clip coupled to the switching node, and the middle portion of the fourth metal clip spaced apart from and at least partially overlying a portion of the third metal clip.
14. The half-bridge circuit of claim 13 , comprising:
a substrate having first and second and third conductive traces that form the respective switching, supply, and reference nodes;
a first semiconductor die mounted to the substrate and including the first transistor; and
a second semiconductor die mounted to the substrate and including the second transistor.
15. The half-bridge circuit of claim 12 , comprising:
a substrate having first and second and third conductive traces that form the respective switching, supply, and reference nodes;
a first semiconductor die mounted to the substrate and including the first transistor; and
a second semiconductor die mounted to the substrate and including the second transistor.
16. A method of fabricating an electronic device, the method comprising:
attaching a first end portion of a first metal clip to a first terminal of a transistor of a semiconductor die;
attaching a second end portion of the first metal clip to a first conductive trace of a substrate;
attaching a first end portion of; a second metal clip to a second terminal of the transistor, the first and second terminals on a same side of the semiconductor die; and
attaching a second end portion of the second metal clip to a second conductive trace of the substrate with a middle portion of the second metal clip spaced apart from and at least partially overlying a portion of the first metal clip.
17. The method of claim 16 , further comprising:
attaching a first end portion of a third metal clip to a first terminal of a second transistor of a second semiconductor die;
attaching a second end portion of the third metal clip to a third conductive trace of the substrate;
attaching a first end portion of a fourth metal clip to a second terminal of the second transistor; and
attaching a second end portion of the fourth metal clip to the first conductive trace of the substrate with a middle portion of the fourth metal clip spaced apart from and at least partially overlying a portion of the third metal clip.
18. The method of claim 17 , wherein attaching the end portions of the metal clips includes:
providing solder to the respective transistor terminals and conductive traces;
positioning the end portions of the metal clips on the solder; and
reflowing the solder.
19. The method of claim 16 , wherein attaching the end portions of the metal clips includes:
providing solder to the respective transistor terminals and conductive traces;
positioning the end portions of the metal clips on the solder; and
reflowing the solder.