Resolver quadrant detection
A system includes first precision rectifier operatively connected to receive high and low signals of a sine coil of a resolver and to output a first signaled condition and an exciter coil of the resolver. A second precision rectifier is operatively connected to receive high and low signals of a cosine coil of the resolver and to output a second signaled condition. A quadrant detection circuit operatively connected to receive high and low signals of the exciter coil of the resolver, high and low signals from the sine coil, and high and low signals from the cosine coil. The quadrant detection circuit outputs a signal indicative of quadrant position of the resolver.
1 . A system comprising:
a resolver including a sine coil, a cosine coil, and an exciter coil;
a resolver exciter operatively connected to excite the exciter coil, and to provide high and low signals;
a processing device operatively connected to control the resolver exciter;
first precision rectifier operatively connected to receive high and low signals of the sine coil of the resolver and to output a first signaled condition;
a second precision rectifier operatively connected to receive high and low signals of the cosine coil of the resolver and to output a second signaled condition; and
a quadrant detection circuit operatively connected to receive high and low signals of the exciter coil of the resolver from the resolver exciter, wherein the quadrant detection circuit is operatively connected to receive high and low signals from the sine coil and from the cosine coil, and to output a signal indicative of quadrant position of the resolver; and
an analog to digital converter (ADC) component operatively connected to receive the first signaled condition, the second signaled condition, and the signal indicative of quadrant position of the resolver, and to output a digital signal, wherein the ADC component includes:
a first ADC operatively connected to receive the first signaled condition and to output a
first digital signal for determining quadrant position of the resolver to the processing device;
a second ADC operatively connected to receive the second signaled condition and to output a second digital signal for determining quadrant position of the resolver to the processing device; and
a third ADC operatively connected to receive the signal indicative of quadrant position of
the resolver and to output a digital signal for determining quadrant position of the resolver to the processing device.
2 . The system as recited in claim 1 , wherein the quadrant detection circuit includes logic configured to output a signal indicative of resolver position in a first quadrant upon receiving high input of the sine coil, high input of the cosine coil, and high input of the exciter coil.
3 . The system as recited in claim 2 , wherein the logic is configured to output a signal indicative of resolver position in a second quadrant upon receiving high input of the sine coil, low input of the cosine coil, and high input of the exciter coil.
4 . The system as recited in claim 3 , wherein the logic is configured to output a signal indicative of resolver position in a third quadrant upon receiving low input of the sine coil, low input of the cosine coil, and high input of the exciter coil.
5 . The system as recited in claim 4 , wherein the logic is configured to output a signal indicative of resolver position in a fourth quadrant upon receiving low input of the sine coil, high input of the cosine coil, and high input of the exciter coil.
6 . A system comprising:
first precision rectifier operatively connected to receive high and low signals of a sine coil of a resolver and to output a first signaled condition;
a second precision rectifier operatively connected to receive high and low signals of a cosine coil of the resolver and to output a second signaled condition; and
a quadrant detection circuit operatively connected to receive high and low signals of the exciter coil of the resolver, wherein the quadrant detection circuit is operatively connected to receive high and low signals from the sine coil and from the cosine coil, and to output a signal indicative of quadrant position of the resolver, wherein the quadrant detection circuit includes:
a first zero crossing detector for the high and low signals of the exciter coil configured to output a high or low output for the exciter coil;
a second zero crossing detector for the high and low signals of the sine coil configured to output a high or low output for the sine coil;
a third zero crossing detector for the high and low signals of the cosine coil configured to output a high or low signal for the cosine coil; and
wherein the quadrant detection circuit includes logic configured to determine quadrant position of the resolver based on output from the first, second, and third zero crossing detectors.
7 . The system as recited in claim 6 , wherein the logic includes PWM generator configured to output a PWM signal with a respective predetermined duty cycle representative of each of the respective four quadrants of the quadrant position of the resolver.
8 . The system as recited in claim 7 , wherein the processing device is configured to interpret a digital representation of the PWM signal into a quadrant position of the resolver, and to provide output indicative of angular speed and/or position of the resolver.