IP Library › Granted Patent US 12,463,019
Granted Patent B2
US 12,463,019 · App. 17/815,236 · Granted Nov 4, 2025

Apparatus for fabricating a semiconductor structure and method of fabricating a semiconductor structure

Inventors: Keith Kuang-Kuo Koai (Hsinchu County, TW); Shih-Kuo Liu (Nantou County, TW); Wen-Chih Wang (New Taipei, TW); Hsin-Liang Chen (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
H01J37/32642H01L21/02019H01L21/3065H01L21/68721H01L21/68742
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,463,019
App. No.
17/815,236
Granted
Nov 4, 2025
Kind
B2
Abstract

The present disclosure provides a method for fabricating a semiconductor structure, including placing a wafer on a chuck, wherein the wafer is surrounded by a focus ring, the focus ring is supported by a first actuator, wherein the first actuator is in a cavity defined by the chuck and the edge ring, wherein the first actuator includes an outer ring disposed in the cavity, a piezoelectric layer apart from a top surface of the cavity, wherein an edge of the piezoelectric layer is fixed by the outer ring, and an inner ring disposed in the chamber at a center portion of the piezoelectric layer, performing plasma etch on a surface of the wafer, and controlling a distance between a gas distribution plate and a top surface of the focus ring to be less than a threshold value by the first actuator.

Claims (40)

1 . A method for fabricating a semiconductor structure, comprising:

placing a wafer on a chuck, wherein the wafer is surrounded by a focus ring, the focus ring is supported by a first actuator, wherein the first actuator is in a cavity defined by the chuck and an edge ring, wherein the first actuator comprises:

an outer ring disposed in the cavity, wherein the outer ring is fixed to the edge ring, and a chamber is defined in the outer ring;

a piezoelectric layer apart from a top surface of the cavity, wherein an edge of the piezoelectric layer is fixed by the outer ring; and

an inner ring disposed in the chamber at a center portion of the piezoelectric layer, wherein the inner ring overlaps with the focus ring from a top view perspective;

performing plasma etch on a surface of the wafer; and

controlling a distance between a gas distribution plate (GDP) and a top surface of the focus ring to be less than a threshold value by the first actuator.

2 . The method of claim 1 , further comprising:

supplying gas through the GDP; and

increasing a gap height between a bottom surface of the focus ring and a top surface of the edge ring during the plasma etch.

3 . The method of claim 2 , further comprising increasing the gap height between bottom surface of the focus ring and the top surface of the edge ring according to a preset time schedule.

4 . The method of claim 2 , further comprising increasing the gap height between the bottom surface of the focus ring and the top surface of the edge ring according to a distance between the GDP and the top surface of the focus ring.

5 . The method of claim 4 , further comprising obtaining the distance by an acoustic transceiver.

6 . The method of claim 5 , wherein controlling the distance comprises adjusting a voltage supplied to the first actuator according to the distance obtained by the acoustic transceiver.

7 . The method of claim 2 , further comprising increasing the gap height between the bottom surface of the focus ring and the top surface of the edge ring according to a thickness of the focus ring.

8 . The method of claim 1 , wherein controlling the distance between the GDP and the top surface of the focus ring comprises: adjusting a power supplied to the first actuator, thereby a position of the center portion of the piezoelectric layer displaces.

9 . A method for fabricating a semiconductor structure, comprising:

placing a wafer on a chuck, wherein the wafer is surrounded by a focus ring, the focus ring is supported by a first actuator, wherein the first actuator is in a cavity defined by the chuck and an edge ring, wherein the first actuator comprises:

a piezoelectric layer, wherein a peripheral portion of the piezoelectric layer is fixed, and a bottom surface of the piezoelectric layer is apart from a first portion of the chuck and a first portion of the edge ring along a vertical direction;

a lift pin, placed over the piezoelectric layer; and

an inner ring, wherein the inner ring bears the lift pin, and the inner ring is at least partially surrounded by the piezoelectric layer laterally;

performing plasma etch on a surface of the wafer; and

adjusting a power supplied to the first actuator to adjust a vertical position of the center portion of the piezoelectric layer.

10 . The method of claim 9 , wherein the first actuator further comprises an insulation ring disposed in the cavity.

11 . The method of claim 10 , wherein the first portion of the chuck and the first portion of the edge ring are under a coverage of a vertical projection area of the insulation ring.

12 . The method of claim 10 , wherein the peripheral portion of the piezoelectric layer is fixed by the insulation ring.

13 . The method of claim 9 , further comprising controlling a distance between a gas distribution plate (GDP) and a top surface of the focus ring to be less than a threshold value by the first actuator.

14 . A method for fabricating a semiconductor structure, comprising:

placing a wafer on a chuck, wherein the wafer is surrounded by a focus ring, the focus ring is supported by a first actuator, wherein the first actuator is in a cavity defined by the chuck and an edge ring, wherein the first actuator comprises:

an outer ring disposed in the cavity, wherein the outer ring is fixed to the edge ring, and a chamber is defined in the outer ring;

a piezoelectric layer apart from a top surface of the cavity, wherein an edge of the piezoelectric layer is fixed by the outer ring; and

an inner ring disposed in the chamber at a center portion of the piezoelectric layer, wherein the inner ring overlaps with the focus ring from a top view perspective;

performing plasma etch on a surface of the wafer; and

adjusting a vertical position of the inner ring during the plasma etch.

15 . The method of claim 14 , further comprising replacing the focus ring with another focus ring according to a preset time schedule.

16 . The method of claim 14 , further comprising increasing a gap height between a bottom surface of the focus ring and a top surface of the edge ring during the plasma etch.

17 . The method of claim 14 , wherein the focus ring is detachable from the first actuator.

18 . The method of claim 14 , wherein the vertical position of the inner ring is adjusted by adjusting a power supplied to the first actuator.

19 . The method of claim 18 , wherein a magnitude of voltage of the power supplied to the first actuator is positively correlated to a counted period of time obtained by a timer.

20 . The method of claim 14 , wherein a pressure in the chamber is less than 100 mTorr.

Continuity (2)
Division 16583066 · Sep 25, 2019
Related Publication 20220359169A1 · Nov 10, 2022
References Cited (6)
US 20160211166A1 · Yan · 2016 [cited by examiner]
US 20170213758A1 · Rice · 2017 [cited by examiner]
US 20190067019A1 · Tabata · 2019 [cited by examiner]
US 20190355557A1 · Moriya · 2019 [cited by examiner]
US 20200013657A1 · Lee · 2020 [cited by examiner]
US 20200335368A1 · Pan · 2020 [cited by examiner]