IP Library › Granted Patent US 12,463,748
Granted Patent B2
US 12,463,748 · App. 18/210,838 · Granted Nov 4, 2025

Data receiving apparatus and method having blind deconvolution mechanism

Inventors: Feng-Xiang Wang (Shanghai, CN); Ming-Yue You (Qinhuangdao, CN); Jyun-Wei Pu (Hsinchu County, TW); Jia-Yi Zhuang (Shanghai, CN)
Assignee: REALTEK SEMICONDUCTOR CORPORATION
H04L1/0059H04L1/0038H04L1/0054H04L1/0071H04L25/03866
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Quick Facts
Patent No.
US 12,463,748
App. No.
18/210,838
Granted
Nov 4, 2025
Kind
B2
Abstract

The present disclosure discloses a data receiving apparatus and a data receiving method having blind deconvolution mechanism. A descrambling circuit descrambles received data according to an antenna assumption and N data position assumptions within a transmission period to generate N groups of soft-bit data. A soft-bit processing circuit retrieves bit position data to determine non-variable bit positions and variable bit positions. N circular buffers of a storage circuit store and superimpose the N groups of soft-bit data corresponding to N data position assumptions in a circular manner to generate N groups of superimposed results and keep the data corresponding to the non-variable bit positions. A post-processing circuit performs de-interleaving and decoding on the N groups of superimposed results to generate N groups of decoded results to perform redundancy check thereon. When one decoded results passes the redundancy check, the soft-bit processing circuit stops performing the blind deconvolution process.

Claims (43)

1 . A data receiving apparatus having blind deconvolution mechanism comprising:

a descrambling circuit configured to descramble received data received from an antenna according to an antenna assumption of the antenna and N data position assumptions within a transmission period to generate N groups of soft-bit data, wherein the received data is generated according to a convolution encoding process and comprises N data sub-blocks within the transmission period, the N data position assumptions in turn assume that a first data sub-block of the received data is a first original data sub-block of original data to that the first data sub-block is an N-th original data sub-block of the original data;

a storage circuit comprising N circular buffers each having a unit encoding length;

a soft-bit processing circuit configured to retrieve bit position information corresponding to the unit encoding length to determine a plurality of non-variable bit positions and a plurality of variable bit positions to perform a blind deconvolution process comprising:

storing and superimposing the N groups of soft-bit data corresponding to the N data position assumptions in a circular manner to generate N groups of superimposed results by the N circular buffers of the storage circuit; and

determining that a new assumed transmission period starts to keeping data corresponding to the non-variable bit positions in the N circular buffers and clearing data corresponding to the variable bit positions in the N circular buffers; and

a post-processing circuit configured to perform de-interleaving and decoding on the N groups of superimposed results of each of data sub-blocks to generate N groups of decoded results to perform redundancy check on the N groups of decoded results to generate N checked results;

wherein the soft-bit processing circuit determines that any one group of the N groups of decoded results passes the redundancy check according to the N checked results to outputs the group of decoded results that pass the redundancy check.

2 . The data receiving apparatus of claim 1 , wherein the soft-bit processing circuit determines that the N groups of decoded results do not pass the redundancy check according to the N checked results to keeps performing the blind deconvolution process to superimpose the N groups of soft-bit data by using the N circular buffers.

3 . The data receiving apparatus of claim 1 , wherein each group of the N groups of soft-bit data is a log-likelihood ratio (LLR).

4 . The data receiving apparatus of claim 1 , wherein the antenna assumption assumes a number of the antenna to be M such that, a number of the storage circuits comprised by the data receiving apparatus is M, and the descrambling circuit performs descrambling on the M antennas assumed based on the antenna assumption and the N data position assumptions to generate the soft-bit data having a number of M×N, the soft-bit processing circuit stores and superimposes the M×N soft-bit data in the circular manner by using the N circular buffers of each the M storage circuits to generate the M×N groups of superimposed results.

5 . The data receiving apparatus of claim 1 , wherein the convolution encoding process comprises a check code attaching process, a channel encoding process, an interleaving process, a rate-matching process and a scrambling process performed by a data transmission apparatus that transmits the received data, and the bit position information is generated according to an interleaving algorithm of the interleaving process.

6 . The data receiving apparatus of claim 1 , wherein the post-processing circuit comprises:

a deinterleaving circuit configured to perform deinterleaving on the group of superimposed results of each of the data sub-blocks to generate N groups of deinterleaving results;

a decoding circuit configured to perform decoding on the N groups of deinterleaving results to generate N groups of the decoded results; and

a checking circuit configured to check the N groups of decoded results to generate and transmit the N checked results to the soft-bit processing circuit.

7 . The data receiving apparatus of claim 1 , further comprising a channel estimation circuit and an equalizing circuit configured to perform channel estimation and equalization on the received data and transmit the estimated and equalized received data to the descrambling circuit.

8 . The data receiving apparatus of claim 1 , wherein a length of the transmission period is 640 milliseconds.

9 . The data receiving apparatus of claim 8 , wherein the length of the transmission period comprises the 8 data sub-blocks each having 200 bits and the unit encoding length is 150 bits.

10 . A data receiving method having blind deconvolution mechanism used in a data receiving apparatus, comprising:

descrambling received data received from an antenna by a descrambling circuit according to an antenna assumption of the antenna and N data position assumptions within a transmission period to generate N groups of soft-bit data, wherein the received data is generated according to a convolution encoding process and comprises N data sub-blocks within the transmission period, the N data position assumptions in turn assume that a first data sub-block of the received data is a first original data sub-block of original data to that the first data sub-block is an N-th original data sub-block of the original data;

retrieving bit position information corresponding to the unit encoding length by a soft-bit processing circuit to determine a plurality of non-variable bit positions and a plurality of variable bit positions

performing a blind deconvolution process by the soft-bit processing circuit that comprises:

storing and superimposing the N groups of soft-bit data corresponding to the N data position assumptions in a circular manner by using N circular buffers each having a unit encoding length comprised by a storage circuit to generate N groups of superimposed results by the soft-bit processing circuit; and

determining that a new assumed transmission period starts to keep data corresponding to the non-variable bit positions in the N circular buffers and clear data corresponding to the variable bit positions in the N circular buffers;

performing de-interleaving and decoding on the N groups of superimposed results of each of data sub-blocks by a post-processing circuit to generate N groups of decoded results to perform redundancy check on the N groups of decoded results to generate N checked results; and

determining that any one group of the N groups of decoded results passes the redundancy check according to the N checked results to output the group of decoded results that pass the redundancy check by the soft-bit processing circuit.

11 . The data receiving method of claim 10 , further comprising:

determining that the N groups of decoded results do not pass the redundancy check according to the N checked results to keeps performing the blind deconvolution process to superimpose the N groups of soft-bit data by using the N circular buffers by the soft-bit processing circuit.

12 . The data receiving method of claim 10 , wherein each group of the N groups of soft-bit data is a log-likelihood ratio (LLR).

13 . The data receiving method of claim 10 , wherein the antenna assumption assumes a number of the antenna to be M such that a number of the storage circuits comprised by the data receiving apparatus is M, the data receiving method further comprises:

performing descrambling on the M antennas assumed based on the antenna assumption and the N data position assumptions by the descrambling circuit to generate the soft-bit data having a number of M×N; and

storing and superimposing the M×N soft-bit data in the circular manner by using the N circular buffers of each the M storage circuits by the soft-bit processing circuit to generate the M×N groups of superimposed results.

14 . The data receiving method of claim 10 , wherein the convolution encoding process comprises a check code attaching process, a channel encoding process, an interleaving process, a rate-matching process and a scrambling process performed by a data transmission apparatus that transmits the received data, and the bit position information is generated according to an interleaving algorithm of the interleaving process.

15 . The data receiving method of claim 10 , further comprising:

performing deinterleaving on the group of superimposed results of each of the data sub-blocks by a deinterleaving circuit comprised by the post-processing circuit to generate N groups of deinterleaving results;

performing decoding on the N groups of deinterleaving results by a decoding circuit comprised by the post-processing circuit to generate N groups of the decoded results; and

checking the N groups of decoded results by a checking circuit comprised by the post-processing circuit to generate and transmit the N checked results to the soft-bit processing circuit.

16 . The data receiving method of claim 10 , further comprising:

performing channel estimation and equalization on the received data respectively by a channel estimation circuit and an equalizing circuit; and

transmitting the estimated and equalized received data to the descrambling circuit.

17 . The data receiving method of claim 10 , wherein a length of the transmission period is 640 milliseconds.

18 . The data receiving method of claim 17 , wherein the length of the transmission period comprises the 8 data sub-blocks each having 200 bits and the unit encoding length is 150 bits.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2024
From: SUZHOU PANKORE INTEGRATED CIRCUIT TECHNOLOGY CO. LTD.
To: REALTEK SEMICONDUCTOR CORPORATION
Reel/Frame 069162/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2023
From: WANG, FENG-XIANG; YOU, MING-YUE; PU, JYUN-WEI; ZHUANG, JIA-YI
To: SUZHOU PANKORE INTEGRATED CIRCUIT TECHNOLOGY CO. LTD.
Reel/Frame 063973/0035 →
Priority Claims (1)
CN 202211210938.7 · Sep 30, 2022 · national
Continuity (1)
Related Publication 20240121028A1 · Apr 11, 2024
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