System, method and apparatus for link training during a clock switch event
In one embodiment, an apparatus comprises: a receiver to receive training data from a transmitter; a clock and data recovery (CDR) circuit coupled to the receiver, the CDR circuit to recover a recovered clock signal from the training data; and a media access control (MAC) circuit coupled to the CDR circuit, wherein the MAC circuit is to send a clock switch indicator to the CDR circuit to cause the CDR circuit to halt tracking operation of the CDR circuit. Other embodiments are described and claimed.
1 . An apparatus comprising: a receiver to receive training data from a transmitter;
a clock and data recovery (CDR) circuit coupled to the receiver, the CDR circuit to recover a recovered clock signal from the training data; and
a media access control (MAC) circuit coupled to the CDR circuit, wherein the MAC circuit is to send a clock switch indicator to the CDR circuit to cause the CDR circuit to halt tracking operation of the CDR circuit; wherein:
the apparatus comprises a re-timer;
the re-timer comprises:
a physical (PHY) circuit comprising the receiver and the CDR circuit; and
a link layer circuit coupled to the PHY circuit, the link layer circuit comprising the MAC circuit; and
the re-timer is to send a clock switch request to the transmitter when the MAC circuit detects the training data.
2 . The apparatus of claim 1 , wherein the MAC circuit comprises a clock switch detector to detect a clock switch event in the transmitter, the MAC circuit to send the clock switch indicator in response to the detection of the clock switch event.
3 . The apparatus of claim 2 , wherein the clock switch detector is to detect the clock switch event based at least in part on a loss of the training data.
4 . The apparatus of claim 2 , wherein the clock switch detector is to detect the clock switch event based at least in part on a marker included in the training data.
5 . The apparatus of claim 1 , wherein in response to the clock switch indicator, the CDR circuit is to halt the tracking operation for a predetermined time duration.
6 . The apparatus of claim 5 , wherein, after the predetermined time duration, the CDR circuit is to re-lock onto the training data.
7 . A method comprising:
receiving, in a receiver circuit, training data from a transmitter;
detecting that a clock switch event has occurred in the transmitter;
in response to detecting that the clock switch event has occurred, halting a tracking mode of a clock and data recovery (CDR) circuit; and
receiving the training data from the transmitter, the training data generated in the transmitter according to a local clock signal, the transmitter comprising a first re-timer, the first re-timer coupled to a second re-timer, and the second re-timer comprising the receiver circuit.
8 . The method of claim 7 , further comprising re-initiating the tracking mode of the CDR circuit after a predetermined time duration.
9 . The method of claim 7 , further comprising:
re-initiating the tracking mode of the CDR circuit after a predetermined time duration; and thereafter receiving, in the receiver circuit, the training data from the transmitter, the training data forwarded from the transmitter according to a recovered clock signal.
10 . The method of claim 7 , further comprising detecting the clock switch event when an error rate of the training data exceeds a threshold.
11 . The method of claim 7 , further comprising detecting the clock switch event based on an indicator present in a header of the training data.
12 . A system comprising:
a host device;
a device coupled to the host device via a link; and
at least one re-timer coupled between the host device and the device, wherein the at least one re-timer comprises:
a receiver to receive training data from a transmitter;
a clock and data recovery (CDR) circuit coupled to the receiver, the CDR circuit to recover a recovered clock signal from the training data; and
a media access control (MAC) circuit coupled to the CDR circuit, wherein the MAC circuit is to send a clock switch indicator to the CDR circuit to cause the CDR circuit to halt tracking operation of the CDR circuit during a clock switch event in the transmitter, and the MAC circuit comprises a clock switch detector to detect the clock switch event based at least in part on a loss of the training data.
13 . The system of claim 12 , wherein in response to the clock switch indicator, the CDR circuit is to halt the tracking operation for a predetermined time duration.
14 . The system of claim 13 , wherein, after the predetermined time duration, the CDR circuit is to re-lock onto the training data.
15 . The system of claim 12 , wherein the re-timer comprises a physical (PHY)-MAC interface via which the clock switch indicator is sent.