Insulated gate bipolar transistor
IGBT includes an n-type drift layer, an n-type accumulation layer provided on the upper surface of the drift layer having higher impurity concentration than the drift layer, a base layer provided on the upper surface of the accumulation layer, a gate electrode embedded inside a striped gate trench penetrating the base layer and the storage layer through a gate insulating film, and a dummy electrode embedded inside a dummy trench provided to face the gate trench across the base layer and the accumulation layer through a dummy insulating film. The base layer has a p-type active base region and a p-type floating base region arranged alternately in the extending direction of the gate trench, and an n-type base isolation region isolating the active base region and the floating base region.
1 . An insulated gate bipolar transistor comprising:
a drift layer of a first conductivity type;
an accumulation layer of the first conductivity type arranged on an upper surface of the drift layer, having an impurity concentration higher than an impurity concentration of the drift layer;
a base layer arranged on an upper surface of the accumulation layer;
a gate electrode embedded through a gate insulating film inside a stripe-shaped gate trench penetrating the base layer and the accumulation layer;
a dummy electrode embedded through a dummy insulating film inside a stripe-shaped dummy trench penetrating the base layer and the accumulation layer; and
an emitter region of the first conductivity type arranged in an upper portion of the base layer, having a higher impurity concentration than the drift region, wherein
the base layer includes an active base region of a second conductivity type in which the emitter region is arranged in the upper portion, connected to emitter potential, a floating base region of the second conductivity type set at floating potential, and a base isolation region of the first conductivity type isolating the active base region and the floating base region, and
in a mesa provided between the gate trench and the dummy trench, the active base region and the floating base region are alternately arranged via the base isolation region in an extending direction of the gate trench.
2 . The insulated gate bipolar transistor according to claim 1 , wherein the active base region faces the floating base region across the dummy trench.
3 . The insulated gate bipolar transistor according to claim 1 , wherein the active base region faces the other active base region across the gate trench.
4 . The insulated gate bipolar transistor according to claim 1 , wherein the active base region faces the floating base region across the gate trench.
5 . The insulated gate bipolar transistor according to claim 1 , wherein an impurity concentration of the base isolation region is higher than or equal to the impurity concentration of the drift layer and less than or equal to the impurity concentration of the accumulation layer.
6 . The insulated gate bipolar transistor according to claim 5 , wherein the impurity concentration of the base isolation region is more than or equal to 1×10 16 cm −3 and less than or equal to 1×10 17 cm −3 .
7 . The insulated gate bipolar transistor according to claim 1 , wherein,
the base layer further includes an extraction base region of the second conductivity type in which the emitter region is not arranged, connected to the emitter potential, and
in a mesa provided between the dummy trenches adjacent to each other, the extraction base region and the floating base region are alternately arranged via the base isolation region in an extending direction of the dummy trench.
8 . The insulated gate bipolar transistor according to claim 1 , wherein the emitter region and a low-resistance base contact region of the second conductivity type having a higher impurity concentration than the active base region are selectively arranged on an upper portion of the active base region in contact with each other.
9 . The insulated gate bipolar transistor according to claim 8 , wherein both the emitter region and the low-resistance base contact region are in contact with the dummy trench and the gate trench.
10 . The insulated-gate bipolar transistor according to claim 8 , wherein,
in plan view, only one side of the emitter region contacts the gate trench, and
the low-resistance base contact region contacts the dummy trench and the gate trench to cover other sides of the emitter region.
11 . The insulated gate bipolar transistor according to claim 8 , wherein in the extending direction of the gate trench, the low-resistance base contact region is arranged closer to the base isolation region than the emitter region.