Display device
A display device includes a substrate, first and second transistors on the substrate, a first electrode connected to one of the first and second transistors, a second electrode facing the first electrode, and a light emission member between the first and second electrodes, where the first transistor includes a first channel including a polycrystalline semiconductor member on the substrate, a first source electrode and a first drain electrode at respective opposite sides of the first channel, a first gate electrode overlapping the first channel, and a first insulating layer covering the first gate electrode, the second transistor includes a second gate electrode on the first insulating layer, a second channel including an oxide semiconductor member on the second gate electrode, second source and drain electrodes on the second channel, and an external light blocking member on the second source and drain electrodes and overlapping the second channel.
1 . A display device comprising:
a substrate:
a first transistor which is disposed on the substrate and includes:
a first channel disposed on the substrate and including a polycrystalline semiconductor;
a first source and a first drain disposed on the first channel; and
a first gate electrode overlapping the first channel;
a first insulating layer on the first gate electrode,
a second transistor which is disposed on the substrate, is separated from the first transistor and includes:
a second gate electrode disposed on the first insulating layer;
a second channel disposed on the second gate electrode and including an oxide semiconductor;
a second source and a second drain disposed on the second channel; and
a driving voltage line disposed on the second source electrode and the second drain electrode and overlapping the second channel,
a first electrode connected to one of the first transistor and the second transistor;
a second electrode facing the first electrode; and
a light emission member disposed between the first electrode and the second electrode.
2 . The display device of claim 1 , wherein the driving voltage line includes a first driving voltage line extending in a first direction and a second driving voltage line extending in a second direction crossing the first direction.
3 . The display device of claim 2 , further comprising:
a first scan line which is disposed on the substrate;
a second scan line which is disposed on the substrate; and
a data line which crosses the first scan line and the second scan line,
wherein the first transistor further includes:
a switching transistor connected to the first scan line and the data line, and
a driving transistor connected to the switching transistor,
the second transistor further includes:
a compensation transistor connected to the second scan line and
the compensation transistor includes a first oxide semiconductor overlapping the second scan line,
the second channel includes a compensation channel disposed in the first oxide semiconductor, and
the compensation channel overlaps the driving voltage line in a plan view.
4 . The display device of claim 3 , further comprising
a third scan line which extends parallel to the first scan line, and
an initialization voltage line,
wherein the second transistor further includes:
an initialization transistor connected to the third scan line and transmits the initialization voltage to a driving gate electrode of the driving transistor,
the initialization transistor includes a second oxide semiconductor overlapping the third scan line,
the second channel further includes an initialization channel disposed in the second oxide semiconductor, and
the initialization channel overlaps the driving voltage line.
5 . The display device of claim 4 , further comprising
a bypass control line,
wherein the second transistor further includes:
a bypass transistor connected to the bypass control line and bypasses a part of a driving current transmitted by the driving transistor,
the bypass transistor includes a third oxide semiconductor overlapping the bypass control line,
the second channel further includes a bypass channel disposed in the third oxide semiconductor, and
the bypass channel overlaps the driving voltage line.
6 . The display device of claim 5 , wherein
the data line and the first driving voltage line are disposed in different layers from each other.
7 . The display device of claim 5 , wherein
the first scan line and the initialization voltage line are disposed in the same layer as each other, and
the second scan line, the third scan line, and the bypass control line are disposed in the same layer as each other.
8 . The display device of claim 5 , wherein
the compensation channel, the initialization channel, and the bypass channel are separated from each other.
9 . The display device of claim 5 , wherein
the second gate electrode includes:
a compensation gate electrode which is a part of the second scan line and overlaps the compensation channel,
an initialization gate electrode which is a part of the initialization voltage line and overlaps the initialization channel, and
a bypass gate electrode which is a part of the bypass control line and overlaps the bypass channel.
10 . The display device of claim 9 , wherein
the second source electrode includes:
a compensation source electrode disposed in the same layer as the data line and partially overlapping the first oxide semiconductor,
an initialization source electrode disposed in the same layer as the data line and partially overlapping the second oxide semiconductor, and
a bypass source electrode disposed in the same layer as the data line and partially overlapping the third oxide semiconductor.
11 . The display device of claim 10 , wherein
the second drain electrode includes:
a compensation drain electrode disposed in the same layer as the data line and partially overlapping the first oxide semiconductor,
an initialization drain electrode disposed in the same layer as the data line and partially overlapping the second oxide semiconductor, and
a bypass drain electrode disposed in the same layer as the data line and partially overlapping the third oxide semiconductor.
12 . The display device of claim 11 , further comprising
a driving gate electrode overlapping the second driving voltage line, and
a first connecting member disposed in the same layer as the data line and connected to the driving gate electrode,
wherein the first connecting member includes the compensation drain electrode and the initialization source electrode.
13 . The display device of claim 12 , further comprising
a second connecting member disposed in the same layer as the data line and connected to a part of the first channel,
wherein the second connecting member includes the compensation source electrode.
14 . The display device of claim 13 , further comprising
a third connecting member disposed in the same layer as the data line and connected to the initialization voltage line,
wherein the third connecting member includes the initialization source electrode and the bypass drain electrode.
15 . The display device of claim 14 , further comprising
a fourth connecting member disposed in the same layer as the data line and connected to a part of the first channel,
wherein the fourth connecting member includes the bypass source electrode.
16 . The display device of claim 15 , further comprising
a fifth connecting member disposed in the same layer as the data line and connected to the second driving voltage line.
17 . The display device of claim 16 , further comprising
a sixth connecting member disposed in the same layer as the first driving voltage line and connected to the fourth connecting member.
18 . The display device of claim 5 , wherein:
the driving voltage line includes a first boundary line and a second boundary line, and
a plane first interval of the first boundary line and the second channel in a width direction is larger than a plane second interval of the second boundary line and the second channel in a length direction.
19 . The display device of claim 1 , further comprising
a second insulating layer between the second source electrode and the second drain electrode, and the driving voltage line,
wherein the second insulating layer includes an organic material.