IP Library › Granted Patent US 12,468,598
Granted Patent B2
US 12,468,598 · App. 18/415,634 · Granted Nov 11, 2025

Decoder for burst correction read Solomon decoding for memory applications

Inventors: Joseph M. McCrate (Boise, ID); Kirthi Shenoy (Boise, ID); Marco Sforzin (Boise, ID); Brian M. Twait (Boise, ID)
Assignee: Micron Technology, Inc.
G06F11/1016G06F11/1004G06F11/1012G06F11/1044G06F11/1068G06F11/1072H03M13/1575H03M13/373
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Quick Facts
Patent No.
US 12,468,598
App. No.
18/415,634
Granted
Nov 11, 2025
Kind
B2
Abstract

Provided is an apparatus comprising a search engine that (i) receives parallel input of a set of syndrome polynomial products corresponding to a set of ECC words and (ii) produces corresponding sets of polynomial roots therefrom and a sequence detector that identifies sequences within each of the polynomial roots within the set of roots. The apparatus also includes a sequence check logic that (i) combines the identified sequences within each of the polynomial roots and (ii) performs a sequence check of the combined identified sequences to determine whether only one of the identified sequences is valid; and an error location generator that derives an error location in each of the ECC words within the set responsive to the valid sequence.

Claims (36)

1 . An apparatus comprising:

a memory device; and

an ECC decoding system configured to detect and correct an error in data read from the memory device, wherein the ECC decoding system includes:

a search engine configured to (i) receive parallel input of a set of syndrome polynomial products corresponding to a set of ECC words from the memory device, and (ii) produce corresponding sets of polynomial roots for each set of ECC words;

a sequence detector configured to identify sequences within each polynomial roots within the sets of polynomial roots;

a sequence check logic configured to (i) combine the identified sequences within each of the polynomial roots, (ii) perform a sequence check of the combined identified sequences to determine whether only one of the identified sequences is valid, and (iii) determine a valid sequence from the identified sequences by finding points of intersection between the combined identified sequences; and

an error location generator configured to derive an error location in each ECC word within the set of ECC words responsive to the valid sequence.

2 . The apparatus of claim 1 , wherein the search engine performs a Chien search.

3 . The apparatus of claim 2 , wherein the syndrome polynomial products are a function of ECC word syndromes and a constant polynomial.

4 . The apparatus of claim 1 , wherein the set of ECC words are read from a plurality of memory components.

5 . The apparatus of claim 1 , wherein when only a single point of intersection is found, only one of the identified sequences is determined to be a valid sequence.

6 . The apparatus of claim 5 , wherein when more than one point of intersection is found, a decoding error is declared by the sequence check logic.

7 . The apparatus of claim 6 , wherein the single point of intersection represents a common error location across each set of ECC words.

8 . The apparatus of claim 7 , wherein the error locations are a function of a starting position of each polynomial root of the identified sequences.

9 . The apparatus of claim 1 , wherein the search engine, the sequence detector, the sequence check logic, and the error location generator perform burst error control in an error correction and coding decoding process.

10 . A method comprising:

providing a memory device; and

detecting and correcting, using an ECC decoding system, an error in data read from the memory device, comprises:

receiving, via a search engine, parallel input of a set of syndrome polynomial products corresponding to a set of ECC words from the memory device, and producing corresponding sets of polynomial roots for each set of ECC words;

identifying, via a sequence detector, sequences within each polynomial roots within the sets of polynomial roots;

via a sequence check logic, (i) combining the identified sequences within each of the polynomial roots, performing a sequence check of the combined identified sequences to determine whether only one of the identified sequences is valid, and (iii) determining a valid sequence by finding points of intersection between the combined identified sequences; and

deriving, via an error location generator, an error location in each ECC word within the set of ECC words responsive to the valid sequence.

11 . The method of claim 10 , wherein the search engine performs a Chien search.

12 . The method of claim 11 , wherein the syndrome polynomial products are a function of ECC word syndromes and a constant polynomial.

13 . The method of claim 10 , wherein the set of ECC words are read from a plurality of memory components.

14 . The method of claim 10 , wherein when only a single point of intersection is found, only one of the identified sequences is determined to be a valid sequence.

15 . The method of claim 14 , wherein when more than one point of intersection is found, a decoding error is declared by the sequence check logic.

16 . The method of claim 15 , wherein the single point of intersection represents a common error location across each set of ECC words.

17 . The method of claim 16 , wherein the error locations are a function of a starting position of each polynomial root of the identified sequences.

18 . An apparatus comprising:

a memory device; and

an ECC decoding system configured to detect and correct an error in data read from the memory device, wherein the ECC decoding system includes:

two or more search engines configured to (i) receive parallel input of a respective two or more of syndrome polynomial products corresponding to a set of ECC words from the memory device, and (ii) produce respective sets of polynomial roots for each set of ECC words;

two or more sequence detectors, each being configured to identify sequences within a corresponding one of polynomial roots within the sets of polynomial roots;

a pair of sequence check logic modules configured to: (i) combine the identified sequences within each of the polynomial roots, (ii) perform a sequence check of the combined identified sequences to determine whether only one of the identified sequences is valid, and (iii) determine a valid sequence by finding points of intersection between the combined identified sequences; and

a pair of error location generators configured to derive an error location in corresponding ECC words within the set of ECC words responsive to the valid sequence.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2024
From: SFORZIN, MARCO; MCCRATE, JOSEPH M.; TWAIT, BRIAN M.; SHENOY, KIRTHI
To: MICRON TECHNOLOGY, INC.
Reel/Frame 067708/0056 →
Continuity (3)
Provisional Application 63480175 · Jan 17, 2023
Provisional Application 63480183 · Jan 17, 2023
Related Publication 20240345920A1 · Oct 17, 2024
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