IP Library Granted Patent US 12,468,658
Granted Patent B2
US 12,468,658 · App. 18/502,551 · Granted Nov 11, 2025

System on chip and operating method thereof

Inventor: Moongyung Kim (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
G06F15/7807G06F11/3495
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Quick Facts
Patent No.
US 12,468,658
App. No.
18/502,551
Granted
Nov 11, 2025
Kind
B2
Abstract

Disclosed are system-on-chip devices (SoCs) and operating methods thereof. A system-on-chip (SOC) may include a memory including a history storage, a processor configured to execute an application, performance optimization module configured to generate and transmit optimized control information for the processor executing a function included in the application, based on a history corresponding to the function, when the processor executes the function and the history corresponding to the function is in the history storage, and a performance management module configured to generate a control signal for controlling performance of the processor, based on the optimized control information received from the performance optimization module, wherein the history includes control information for the processor and utilization information accumulated according to the control information, the control information having been accumulated during at least one time of previous execution of the function.

Claims (65)

1 . A system-on-chip (SoC) comprising:

a memory including a history storage;

a processor configured to execute an application;

a performance optimization module configured to generate and transmit optimized control information for the processor executing a function included in the application, based on a history corresponding to the function, when the processor executes the function and the history corresponding to the function is in the history storage; and

a performance management module configured to generate a control signal for controlling performance of the processor, based on the optimized control information received from the performance optimization module,

wherein the history includes control information for the processor and utilization information accumulated according to the control information, the control information having been accumulated during at least one time of previous execution of the function, and

wherein the performance optimization module is further configured to

generate a history entry based on the control information set in a desired sampling period and actual utilization information of the processor, the actual utilization information being measured according to the control information in the desired sampling period,

identify operation period information of the function in the history entry,

delete the history entry when an operation period of the function is less than a threshold value, and

store the history entry in the history storage when the operation period of the function is greater than or equal to the threshold value.

2 . The SoC of claim 1 , wherein the optimized control information includes at least one selected from the group consisting of code sequence characteristic information, the utilization information, information on predicted power consumption of the processor, information on an operating voltage and an operating frequency that are predicted to be provided to the processor, predicted temperature information of the processor, predicted throttling information of the processor, and estimated measurement period information.

3 . The SoC of claim 1 , further comprising:

a performance measurement module configured to,

measure the performance of the processor when the function is executed,

obtain the actual utilization information of the processor, and

transmit the actual utilization information to the performance optimization module.

4 . The SoC of claim 3 , wherein the actual utilization information includes at least one selected from the group consisting of internal state monitoring information of the processor, activity state information of the processor, activity cycle information, and information about whether a stall cycle is included, when the function is executed, the internal state monitoring information being measured in the desired sampling period.

5 . The SoC of claim 4 , wherein the performance optimization module is further configured to update the history based on the control information set in the desired sampling period and the actual utilization information of the processor, the actual utilization information being measured according to the control information in the desired sampling period.

6 . The SoC of claim 5 , wherein the performance optimization module is further configured to,

link an updated history to a start address of the function, and

store the updated history in the history storage.

7 . The SoC of claim 1 , wherein, when the history corresponding to the function is not in the history storage at a time of execution of the function,

the performance management module is further configured to generate the control signal for controlling the performance of the processor, based on default control information.

8 . An operating method of a system-on-chip (SoC), the operating method comprising:

executing an application;

generating optimized control information for a processor executing a function included in the application, based on a history corresponding to the function, when the processor executes the function and the history corresponding to the function is in a history storage; and

generating a control signal for controlling performance of the processor, based on the optimized control information,

wherein the history includes control information for the processor and utilization information accumulated according to the control information, the control information having been accumulated during at least one time of previous execution of the function, and

wherein the operating method further comprises

generating a history entry based on the control information set in a desired sampling period and actual utilization information of the processor, the actual utilization information being measured according to the control information in the desired sampling period,

identifying operation period information of the function in the history entry,

deleting the history entry when an operation period of the function is less than a threshold value, and

storing the history entry in the history storage when the operation period of the function is greater than or equal to the threshold value.

9 . The operating method of claim 8 , wherein the optimized control information includes at least one selected from the group consisting of code sequence information, the utilization information, information on predicted power consumption of the processor, information on an operating voltage and an operating frequency that are predicted to be provided to the processor, predicted temperature information of the processor, predicted throttling information of the processor, and estimated measurement period information.

10 . The operating method of claim 8 , further comprising:

measuring the performance of the processor when the function is executed; and

obtaining the actual utilization information of the processor.

11 . The operating method of claim 10 , wherein the actual utilization information includes at least one selected from the group consisting of internal state monitoring information of the processor, activity state information of the processor, activity cycle information, and information about whether a stall cycle is included, when the function is executed, the internal state monitoring information being measured in the desired sampling period.

12 . The operating method of claim 11 , further comprising:

updating the history based on the control information set in the desired sampling period and the actual utilization information of the processor, the actual utilization information being measured according to the control information in the desired sampling period.

13 . The operating method of claim 12 , further comprising:

linking an updated history to a start address of the function; and

storing the updated history in the history storage.

14 . The operating method of claim 8 , further comprising:

when the history corresponding to the function is not in the history storage at a time of execution of the function,

generating the control signal for controlling the performance of the processor, based on default control information.

15 . A system-on-chip (SoC) comprising:

a memory including a history storage;

a processor configured to execute an application; and

a performance controller configured to,

generate optimized control information for the processor executing a function included in the application, by processing a history corresponding to the function based on a run state of the processor, and

generate a control signal for controlling performance of the processor, based on the optimized control information, when the processor executes the function,

wherein the history includes control information for the processor and utilization information accumulated according to the control information, the control information having been accumulated during at least one time of previous execution of the function, and

wherein the performance controller is further configured to

generate a history entry based on the control information set in a desired sampling period and actual utilization information of the processor, the actual utilization information being measured according to the control information in the desired sampling period,

identify operation period information of the function in the history entry,

delete the history entry when an operation period of the function is less than a threshold value, and

store the history entry in the history storage when the operation period of the function is greater than or equal to the threshold value.

16 . The SoC of claim 15 , wherein the optimized control information includes at least one selected from the group consisting of code sequence characteristic information, the utilization information, information on predicted power consumption of the processor, information on an operating voltage and an operating frequency that are predicted to be provided to the processor, predicted temperature information of the processor, predicted throttling information of the processor, and estimated measurement period information.

17 . The SoC of claim 15 , wherein the performance controller is further configured to,

measure the performance of the processor in the desired sampling period when the function is executed,

obtain the control information and the actual utilization information of the processor in the desired sampling period, and

update the history by using the obtained control information and the obtained actual utilization information.

18 . The SoC of claim 17 , wherein the actual utilization information includes at least one selected from the group consisting of internal state monitoring information of the processor, activity state information of the processor, activity cycle information, and information about whether a stall cycle is included, when the function is executed, the internal state monitoring information being measured in the desired sampling period.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2023
From: KIM, MOONGYUNG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 065680/0379 →
Priority Claims (1)
KR 10-2022-0174195 · Dec 13, 2022 · national
Continuity (1)
Related Publication 20240193120A1 · Jun 13, 2024
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