IP Library › Granted Patent US 12,471,207
Granted Patent B2
US 12,471,207 · App. 18/361,868 · Granted Nov 11, 2025

Reflective cancellations in a connector wipe

Inventors: Sandor Farkas (Round Rock, TX); Bhyrav Mutnury (Austin, TX)
Assignee: Dell Products L.P.
H05K1/025H05K1/117H05K2201/09709H05K2201/10318
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Quick Facts
Patent No.
US 12,471,207
App. No.
18/361,868
Granted
Nov 11, 2025
Kind
B2
Abstract

A printed circuit board includes a dielectric and a connector. The connector is mounted on the dielectric. The connector includes a first connector lead, a first contact point, and a first connector wipe. The first connector wipe includes a first wider section adjacent to the first contact point. The first wider section creates an impedance mismatch between the first connector lead and the first connector wipe.

Claims (29)

1 . A printed circuit board comprising:

a dielectric; and

a connector mounted on the dielectric, the connector including a first connector lead, a first contact point, and a first connector wipe, the first connector wipe including a first wider section adjacent to the first contact point, wherein the first wider section creates an impedance mismatch between the first connector lead and the first connector wipe, wherein the first wider section has a lower impedance as compared to the first connector lead, and an amplitude of a reflected signal is reduced by the lower impedance of the first wider section.

2 . The printed circuit board of claim 1 , wherein the first connector wipe is a stub extending beyond the first contact point.

3 . The printed circuit board of claim 1 , wherein the first wider section creates multiple reflected signals within the first connector wipe.

4 . The printed circuit board of claim 3 , wherein an amplitude of each of the reflected signals is less than a previous amplitude of a previous reflected signal.

5 . The printed circuit board of claim 1 , wherein the connector further includes:

a second connector lead;

a second contact point; and

a second connector wipe, wherein the second connector wipe includes a second wider section adjacent to the second contact point, wherein a first location of the first wider section is offset on the dielectric as compared to a second location of the second wider section.

6 . The printed circuit board of claim 1 , wherein the first contact point is located between the first connector lead and the first connector wipe.

7 . An information handling system comprising:

a cable connector having an extension portion and a contact portion; and

a printed circuit board including:

a dielectric; and

a connector mounted on the dielectric, the connector including a first connector lead, a first contact point, and a first connector wipe, the first connector wipe including a first wider section adjacent to the first contact point, wherein the first wider section creates an impedance mismatch between the first connector lead and the first connector wipe, wherein the first contact portion of the cable connector is configured to be placed in physical communication with the first contact point of the connector, wherein the first wider section has a lower impedance as compared to the first connector lead, and an amplitude of a reflected signal is reduced by the lower impedance of the first wider section.

8 . The information handling system of claim 7 , wherein the first connector wipe is a stub extending beyond the first contact point.

9 . The information handling system of claim 7 , wherein the first wider section creates multiple reflected signals within the first connector wipe.

10 . The information handling system of claim 9 , wherein an amplitude of each of the reflected signals is less than a previous amplitude of a previous reflected signal.

11 . The information handling system of claim 7 , wherein the connector further includes:

a second connector lead;

a second contact point; and

a second connector wipe, wherein the second connector wipe includes a second wider section adjacent to the second contact point, wherein a first location of the first wider section is offset on the dielectric as compared to a second location of the second wider section.

12 . The information handling system of claim 7 , wherein the first contact point is located between the first connector lead and the first connector wipe.

13 . The information handling system of claim 7 , wherein a main portion of a signal is provided into the contact portion of the cable connector and a separate portion of the signal is provided into the first connector wipe.

14 . A printed circuit board comprising:

a dielectric; and

a connector mounted on the dielectric, the connector including a first connector lead a first connector wipe, and a first contact point located between the first connector lead and the first connector wipe, the first connector wipe including a first wider section adjacent to the first contact point, wherein the first wider section creates an impedance mismatch between the first connector lead and the first connector wipe, wherein the first wider section has a lower impedance as compared to the first connector lead, wherein an amplitude of a reflected signal is reduced by the lower impedance of the first wider section.

15 . The printed circuit board of claim 14 , wherein the first wider section creates multiple reflected signals within the first connector wipe.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2023
From: FARKAS, SANDOR; MUTNURY, BHYRAV
To: DELL PRODUCTS L.P.
Reel/Frame 064429/0199 →
Continuity (1)
Related Publication 20250040033A1 · Jan 30, 2025
References Cited (3)
US 11320470B2 · Farkas et al. · 2022 [cited by applicant]
US 20170358878A1 · Smith, Jr. · 2017 [cited by examiner]
US 20210378094A1 · Chandra et al. · 2021 [cited by applicant]