IP Library Granted Patent US 12,475,849
Granted Patent B2
US 12,475,849 · App. 18/785,980 · Granted Nov 18, 2025

Pixel and display device including the same

Inventors: Jang Mi Kang (Yongin-si, KR); Jun Hyun Park (Yongin-si, KR); Min Jae Jeong (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/3233H10K59/1213H10K59/1216H10K59/126H10K59/131G09G2300/0413G09G2300/0819G09G2300/0852G09G2300/0861G09G2310/08G09G2320/0247G09G2320/0257G09G2330/021
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Quick Facts
Patent No.
US 12,475,849
App. No.
18/785,980
Granted
Nov 18, 2025
Kind
B2
Abstract

A pixel of display device includes a light emitting element, a first transistor coupled between first power source and a second node and having a gate electrode connected to a first node N 1 , and the first transistor being configured to control a driving current supplied to the light emitting element in response to a voltage of the first node, a first capacitor including one electrode connected to the first node and another electrode connected to a third node, a second transistor coupled between the third node and a data line, a third transistor coupled between the first node and the second node, a fourth transistor coupled between the first node and an initialization power source, a fifth transistor coupled between a reference power source and the third node, and an eighth transistor coupled between a fourth node and an anode initialization power source.

Claims (60)

1 . A pixel of a display device, the pixel comprising:

a light emitting element;

a first transistor coupled between a first power source line and a second node and having a gate electrode connected to a first node;

a first capacitor including one electrode connected to the first node and another electrode connected to a third node;

a second transistor coupled between the third node and a data line;

a third transistor coupled between the first node and the second node;

a fifth transistor coupled between a second power source line and the third node; and

an eighth transistor coupled between a fourth node and a third power source line.

2 . The pixel according to claim 1 , further comprising:

a fourth transistor coupled between the first node and a fourth power source line.

3 . The pixel according to claim 2 , further comprising:

a sixth transistor coupled between the first power source line and a fifth node connected to one electrode of the first transistor; and

a seventh transistor coupled between the second node and the fourth node.

4 . The pixel according to claim 3 , further comprising:

a ninth transistor coupled between the fifth node and a fifth power source line.

5 . The pixel according to claim 4 , further comprising:

a second capacitor including one electrode connected to the first power source line and another electrode connected to the third node.

6 . The pixel according to claim 5 , wherein:

the first power source line supplies a first voltage,

the second power source line supplies a second voltage,

the third power source line supplies a third voltage,

the fourth power source line supplies a fourth voltage, and

the fifth power source line supplies a fifth voltage which has a positive voltage.

7 . The pixel according to claim 5 , wherein the first power source line and one electrode of the sixth transistor are connected by a bridge pattern.

8 . The pixel according to claim 7 , wherein the pixel further comprises:

a (2_1)-th capacitor including one electrode connected to the bridge pattern and another electrode connected to the other electrode of the first capacitor.

9 . The pixel according to claim 8 , wherein the second power source line and one electrode of the fifth transistor are connected by a first contact hole.

10 . The pixel according to claim 9 , wherein the third power source line and one electrode of the eight transistor are connected by a second contact hole.

11 . The pixel according to claim 10 , wherein the fourth power source line and one electrode of the fourth transistor are connected by a third contact hole.

12 . The pixel according to claim 11 , wherein the fifth power source line and one electrode of the ninth transistor are connected by a fourth contact hole.

13 . The pixel according to claim 1 , wherein

the second transistor includes a (2_1)-th transistor and a (2_2)-th transistor connected in series, and includes a first shielding pattern overlapping a node between the (2_1)-th transistor and the (2_2)-th transistor, and

the first shielding pattern is connected to the third power source line.

14 . The pixel according to claim 1 , wherein

the third transistor includes a (3_1)-th transistor and a (3_2)-th transistor connected in series, and includes a second shielding pattern overlapping a node between the (3_1)-th transistor and the (3_2)-th transistor, and

the second shielding pattern is connected to the first power source line.

15 . The pixel according to claim 2 , wherein

the fourth transistor includes a (4_1)-th transistor and a (4_2)-th transistor connected in series, and includes a third shielding pattern overlapping a node between the (4_1)-th transistor and the (4_2)-th transistor, and

the third shielding pattern is connected to the first power source line.

16 . The pixel according to claim 1 , wherein

the fifth transistor includes a (5_1)-th transistor and a (5_2)-th transistor connected in series, and includes a third shielding pattern overlapping a node between the (5_1)-th transistor and the (5_2)-th transistor, and

the third shielding pattern is connected to the third power source line.

17 . An electronic device, comprising:

a processor to provide input image data; and

a display device to display an image based on the input image data, the display device comprising a pixel,

wherein the pixel comprises:

a light emitting element;

a first transistor coupled between a first power source line and a second node and having a gate electrode connected to a first node;

a first capacitor including one electrode connected to the first node and another electrode connected to a third node;

a second transistor coupled between the third node and a data line;

a third transistor coupled between the first node and the second node;

a fifth transistor coupled between a second power source line and the third node; and

an eighth transistor coupled between a fourth node and a third power source line.

18 . The electronic device according to claim 17 , wherein the pixel further comprises:

a fourth transistor coupled between the first node and a fourth power source line.

19 . The electronic device according to claim 18 , wherein the pixel further comprises:

a sixth transistor coupled between the first power source line and a fifth node connected to one electrode of the first transistor; and

a seventh transistor coupled between the second node and the fourth node.

20 . The electronic device according to claim 19 , wherein the pixel further comprises:

a ninth transistor coupled between the fifth node and a fifth power source line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2024
From: KANG, JANG MI; PARK, JUN HYUN; JEONG, MIN JAE
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 068098/0823 →
Priority Claims (1)
KR 10-2021-0158908 · Nov 17, 2021 · national
Continuity (3)
Continuation 18201739 · May 24, 2023
Continuation 17886393 · Aug 11, 2022
Related Publication 20240386850A1 · Nov 21, 2024
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