Semiconductor structure
A semiconductor structure includes a substrate, a first semiconductor die, a second semiconductor die, and a multi-terminal capacitor structure. The substrate includes a wiring structure. The first semiconductor die and the second semiconductor die are disposed over the substrate. The multi-terminal capacitor structure is embedded in the substrate. The multi-terminal capacitor structure includes a first positive terminal and a first ground terminal which are electrically coupled to the first semiconductor die through the wiring structure. The multi-terminal capacitor structure also includes a second positive terminal and a second ground terminal which are electrically coupled to the second semiconductor die through the wiring structure.
1 . A semiconductor structure, comprising:
a substrate comprising a wiring structure;
a first semiconductor die and a second semiconductor disposed over the substrate; and
a multi-terminal capacitor structure embedded in the substrate and comprising:
a first positive terminal and a first ground terminal electrically coupled to the first semiconductor die through the wiring structure; and
a second positive terminal and a second ground terminal electrically coupled to the second semiconductor die through the wiring structure,
wherein a bottom surface of the first positive terminal, a bottom surface of the second positive terminal, a bottom surface of the first ground terminal and a bottom surface of the second ground terminal are at the same level.
2 . The semiconductor structure as claimed in claim 1 , wherein the multi-terminal capacitor structure comprises:
a first multi-terminal capacitor comprising the first positive terminal and the first ground terminal; and
a second multi-terminal capacitor comprising the second positive terminal and the second ground terminal.
3 . The semiconductor structure as claimed in claim 2 , wherein the multi-terminal capacitor structure further comprises:
a semiconductor substrate; and
an insulating layer disposed over the semiconductor substrate, wherein the first multi-terminal capacitor and the second multi-terminal capacitor are disposed over the insulating layer and are electrically isolated from the semiconductor substrate.
4 . The semiconductor structure as claimed in claim 1 , wherein the wiring structure comprises a first conductive layer and a plurality of conductive vias, and wherein the multi-terminal capacitor structure is substantially aligned with the first conductive layer and is electrically coupled to the first semiconductor die and/or the second semiconductor die through the plurality of conductive vias.
5 . The semiconductor structure as claimed in claim 4 , wherein the wiring structure further comprises a second conductive layer disposed over the multi-terminal capacitor structure and electrically coupling the multi-terminal capacitor structure to the first semiconductor die and/or the second semiconductor die.
6 . The semiconductor structure as claimed in claim 1 , wherein the first positive terminal and the second positive terminal are disposed along a first line, and the first ground terminal and the second ground terminal are disposed along a second line, wherein the first line is substantially parallel to the second line.
7 . The semiconductor structure as claimed in claim 1 , wherein the first positive terminal and the second ground terminal are disposed along a first line, and the first ground terminal and the second positive terminal are disposed along a second line, wherein the first line is substantially parallel to the second line.
8 . The semiconductor structure as claimed in claim 1 , wherein the first ground terminal and the second ground terminal are electrically coupled to a common ground.
9 . The semiconductor structure as claimed in claim 1 , wherein the first ground terminal is electrically coupled to the second ground terminal.
10 . The semiconductor structure as claimed in claim 9 , wherein the first positive terminal is electrically coupled to the second positive terminal.
11 . A semiconductor structure, comprising:
a substrate;
a package structure disposed over the substrate and comprising a first semiconductor die having a first power domain and a second semiconductor die having a second power domain that is different from the first power domain; and
a multi-terminal capacitor structure embedded in the substrate and comprising:
a first multi-terminal capacitor comprising a first positive terminal and a first ground terminal which are electrically coupled to the first power domain; and
a second multi-terminal capacitor comprising a second positive terminal and a second ground terminal which are electrically coupled to the second power domain,
wherein a bottom surface of the first positive terminal, a bottom surface of the second positive terminal, a bottom surface of the first ground terminal and a bottom surface of the second ground terminal are at the same level.
12 . The semiconductor structure as claimed in claim 11 , wherein the substrate comprises:
a conductive layer substantially aligned with the multi-terminal capacitor structure; and
a plurality of conductive vias electrically coupling the first multi-terminal capacitor and the second multi-terminal capacitor to the first semiconductor die and the second semiconductor die, respectively.
13 . The semiconductor structure as claimed in claim 11 , wherein the multi-terminal capacitor structure further comprises:
a semiconductor substrate; and
an insulating layer disposed over the semiconductor substrate, wherein the first multi-terminal capacitor and the second multi-terminal capacitor are disposed over the insulating layer and are electrically isolated from the semiconductor substrate.
14 . The semiconductor structure as claimed in claim 13 , wherein the multi-terminal capacitor structure further comprises a third multi-terminal capacitor comprising a third positive terminal and a third ground terminal,
wherein the first multi-terminal capacitor, the second multi-terminal capacitor, and the third multi-terminal capacitor are electrically isolated from each other.
15 . The semiconductor structure as claimed in claim 14 , wherein the first positive terminal, the second positive terminal, and the third positive terminal are disposed along a first line, and the first ground terminal, the second ground terminal, and the third ground terminal are disposed along a second line.
16 . The semiconductor structure as claimed in claim 14 , wherein the first positive terminal, the second ground terminal, and the third positive terminal are disposed along a first line, and the first ground terminal, the second positive terminal, and the third ground terminal are disposed along a second line.
17 . The semiconductor structure as claimed in claim 11 , further comprising a printed circuit board disposed below the substrate and electrically coupled to the substrate.
18 . The semiconductor structure as claimed in claim 17 , further comprising a plurality of conductive structures disposed between the package structure and the substrate and disposed between the substrate and the printed circuit board.
19 . The semiconductor structure as claimed in claim 11 , wherein the multi-terminal capacitor structure further comprises capacitor cells electrically coupled to the first positive terminal and the first ground terminal, wherein the capacitor cells are located under the bottom surface of the first positive terminal and the bottom surface of the first ground terminal.
20 . The semiconductor structure as claimed in claim 19 , wherein the multi-terminal capacitor structure further comprises a first conductive layer and a second conductive layer, wherein the capacitor cells are located vertically between the first conductive layer and the second conductive layer, and the first positive terminal vertically overlaps both the first conductive layer and the second conductive layer.