IP Library Granted Patent US 12,476,229
Granted Patent B2
US 12,476,229 · App. 18/063,442 · Granted Nov 18, 2025

Electronic package

Inventors: Chih-Hsien Chiu (Taichung, TW); Wen-Jung Tsai (Taichung, TW); Chi-Ching Ho (Taichung, TW)
Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
H01L25/162H01L23/3128H01L23/49816H01L23/49833H01L23/552H01L25/105H01L24/16H01L25/0657H01L2224/16227H01L2225/0651H01L2225/0652H01L2225/1058H01L2225/1076
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Quick Facts
Patent No.
US 12,476,229
App. No.
18/063,442
Granted
Nov 18, 2025
Kind
B2
Abstract

An electronic package is provided, in which a circuit structure is stacked on a carrier structure having a routing layer via support structures, where electronic elements are disposed on upper and lower sides of the circuit structure and the carrier structure, and the electronic elements and the support structures are encapsulated by a cladding layer, such that the electronic package can effectively increase the packaging density to meet the requirements of multi-functional end products.

Claims (17)

1 . An electronic package, comprising:

a carrier structure having a routing layer and defined with a first side and a second side opposing the first side;

a plurality of first electronic elements disposed on the first side and the second side of the carrier structure respectively and electrically connected to the routing layer;

support structures disposed on the first side of the carrier structure and electrically connected to the routing layer;

a circuit structure having a first surface and a second surface opposing the first surface and stacked on the first side of the carrier structure with the first surface via the support structures, wherein the support structures are electrically connected to the circuit structure, and a layout width of the circuit structure is less than a layout width of the carrier structure, such that an accommodating space is formed above the first side of the carrier structure;

a plurality of second electronic elements disposed on the first surface and the second surface of the circuit structure respectively and electrically connected to the circuit structure; and

a cladding layer formed on the first side and the second side of the carrier structure and on the first surface and the second surface of the circuit structure to encapsulate the plurality of first electronic elements, the plurality of second electronic elements and the support structures.

2 . The electronic package of claim 1 , further comprising a functional element disposed in the accommodating space on the first side of the carrier structure, wherein the functional element is electrically connected to the routing layer, wherein a height of the functional element relative to the first side of the carrier structure is greater than a height of the support structures relative to the first side of the carrier structure.

3 . The electronic package of claim 1 , wherein the cladding layer is formed with a plurality of openings on the second surface of the circuit structure, such that partial areas on the second surface of the circuit structure are exposed from the plurality of openings for bonding a plurality of conductive elements.

4 . The electronic package of claim 1 , wherein the circuit structure is electrically connected to the routing layer of the carrier structure via at least one wire.

5 . The electronic package of claim 1 , wherein the support structures are further disposed on the second side of the carrier structure for stacking an electronic module.

6 . The electronic package of claim 1 , wherein the cladding layer is formed with a stepped portion at the accommodating space, wherein an upper surface of the stepped portion is lower than an upper surface of the cladding layer corresponding to the circuit structure, and a plurality of openings are formed on the upper surface of the stepped portion, such that part of the routing layer of the carrier structure is exposed from the plurality of openings.

7 . The electronic package of claim 6 , further comprising a plurality of conductive elements disposed in the plurality of openings to connect to a package module, wherein the package module is electrically connected to the routing layer.

8 . The electronic package of claim 1 , wherein the cladding layer is formed on a partial surface of the first side of the carrier structure, such that the cladding layer is free from covering the accommodating space and is formed with a hollow area at the accommodating space.

9 . The electronic package of claim 1 , further comprising a shielding structure formed on the cladding layer.

10 . The electronic package of claim 1 , wherein the support structures are solder balls, conductive pillars, or copper core balls.

11 . The electronic package of claim 1 , wherein the support structures are circuit boards, and the support structures are bonded to the routing layer on the first side of the carrier structure and the circuit structure via conductors.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2022
From: CHIU, CHIH-HSIEN; TSAI, WEN-JUNG; HO, CHI-CHING
To: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Reel/Frame 062031/0169 →
Priority Claims (1)
TW 111139102 · Oct 14, 2022 · national
Continuity (1)
Related Publication 20240128249A1 · Apr 18, 2024
References Cited (1)
US 11152331B2 · Wang · 2021 [cited by examiner]