IP Library › Granted Patent US 12,483,130
Granted Patent B2
US 12,483,130 · App. 18/306,374 · Granted Nov 25, 2025

Controller of power conversion circuit and operating method thereof

Inventors: Wei-Hsiu Hung (Zhubei, TW); Yen-Chih Lin (Zhubei, TW); Chen-Xiu Lin (Zhubei, TW)
Assignee: UPI SEMICONDUCTOR CORP.
H02M3/157H02M1/0009H02M1/0012H02M1/0025
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Quick Facts
Patent No.
US 12,483,130
App. No.
18/306,374
Granted
Nov 25, 2025
Kind
B2
Abstract

A controller of a power conversion circuit generates PWM signals to control output stage circuits to provide an output voltage and a load current to an output terminal. The controller includes a sensing circuit, a comparison circuit, a PWM generation circuit and a control loop. The sensing circuit generates a current sensing signal related to load current. The comparison circuit compares the current sensing signal and a default value representing a current threshold to generate a comparison result. The control loop, coupled to the output terminal, the PWM generation circuit and the comparison circuit, generates a trigger signal according to a reference voltage and the output voltage to control the PWM generation circuit to generate PWM signals. When the comparison result indicates that the load current exceeds current threshold, the control loop temporarily stops providing trigger signal to PWM generation circuit to delay the generation of PWM signals.

Claims (21)

1 . A controller of a power conversion circuit, coupled to a plurality of output stage circuits and generating a plurality of pulse width modulation (PWM) signals to control the output stage circuits respectively, so that the power conversion circuit provides an output voltage and a load current to an output terminal, the controller comprising:

a sensing circuit, coupled to the output stage circuits and configured to generate a current sensing signal related to the load current;

a first comparison circuit, coupled to the sensing circuit and configured to compare the current sensing signal and a default value to generate a first comparison result, wherein the default value represents a current threshold value;

a PWM generation circuit, coupled to the output stage circuits; and

a control loop, coupled between the output terminal and the PWM generation circuit and also coupled to the first comparison circuit, the control loop being configured to generate a trigger signal according to a reference voltage and the output voltage to control the PWM generation circuit to generate the PWM signals,

wherein when the first comparison result indicates that the load current exceeds the current threshold value, the first comparison result makes the control loop to stop providing the trigger signal to the PWM generation circuit temporarily to delay the generation of the PWM signals, the control loop comprises:

a ramp signal generation circuit, configured to generate a ramp signal and receive the trigger signal to reset the ramp signal;

an error amplifier, coupled to the output terminal and configured to receive the reference voltage and a feedback voltage related to the output voltage to generate an error signal;

a compensation circuit, coupled to the error amplifier and configured to receive the error signal to generate a compensation signal; and

a second comparison circuit, coupled to the ramp signal generation circuit, the compensation circuit and the PWM generation circuit respectively and configured to compare the ramp signal and the compensation signal to generate a second comparison result for generating the trigger signal.

2 . The controller of claim 1 , wherein the ramp signal generation circuit is also coupled to the first comparison circuit; when the current sensing signal is greater than the default value, the first comparison result indicates that the load current exceeds the current threshold value, and the first comparison result makes a slope of a waveform of the ramp signal to be zero.

3 . The controller of claim 1 , wherein the control loop further comprises:

a logic gate, coupled to the first comparison circuit and the second comparison circuit respectively and configured to generate the trigger signal according to the first comparison result and the second comparison result for delaying the reset of the ramp signal.

4 . A controller of a power conversion circuit, coupled to a plurality of output stage circuits and generating a plurality of pulse width modulation (PWM) signals to control the output stage circuits respectively, so that the power conversion circuit providing an output voltage and a load current to an output terminal, the controller comprising:

a sensing circuit, coupled to the output stage circuits and configured to generate a current sensing signal related to the load current;

a first comparison circuit, coupled to the sensing circuit and configured to compare the current sensing signal and a default value to generate a first comparison result, wherein the default value represents a current threshold value;

a PWM generation circuit, coupled to the output stage circuits; and

a control loop, coupled between the output terminal and the PWM generation circuit and also coupled to the first comparison circuit, the control loop being configured to generate a trigger signal according to a reference voltage and the output voltage to control the PWM generation circuit to generate the PWM signals,

wherein when the first comparison result indicates that the load current exceeds the current threshold value, the first comparison result makes the control loop to stop providing the trigger signal to the PWM generation circuit temporarily to delay the generation of the PWM signals, wherein the control loop comprises:

a second comparison circuit, coupled to the output terminal and configured to receive and compare the reference voltage and a feedback voltage related to the output voltage to generate a second comparison result; and

a logic gate, coupled to the first comparison circuit and the second comparison circuit respectively and configured to generate the trigger signal according to the first comparison result and the second comparison result.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2023
From: HUNG, WEI-HSIU; LIN, YEN-CHIH; LIN, CHEN-XIU
To: UPI SEMICONDUCTOR CORP.
Reel/Frame 063428/0335 →
Priority Claims (1)
TW 111126527 · Jul 14, 2022 · national
Continuity (1)
Related Publication 20240022168A1 · Jan 18, 2024
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