IP Library Granted Patent US 12,484,380
Granted Patent B2
US 12,484,380 · App. 18/145,814 · Granted Nov 25, 2025

Display panel

Inventors: Zail Lhee (Yongin-si, KR); Yongsung Park (Yongin-si, KR); Donghyun Lee (Yongin-si, KR); Junghun Yi (Yongin-si, KR); Joohye Jung (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
H10K59/1213H10K59/126H10K59/131
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Quick Facts
Patent No.
US 12,484,380
App. No.
18/145,814
Granted
Nov 25, 2025
Kind
B2
Abstract

A display panel includes a shielding layer overlapped with a semiconductor layer of a transistor connected between a data line and a driving transistor.

Claims (36)

1 . A display panel comprising:

a substrate having a display area and a peripheral area surrounding the display area, the display area including a pixel area in which a row and a column cross each other;

a first thin film transistor in the pixel area, between a driving voltage line and a display element, and including a first semiconductor layer and a first gate electrode overlapped with the first semiconductor layer;

a second thin film transistor in the pixel area, between a data line and the first thin film transistor, and including a second semiconductor layer and a second gate electrode overlapped with the second semiconductor layer; and

a first shielding layer between the substrate and the second semiconductor layer and overlapped with the second semiconductor layer.

2 . The display panel of claim 1 , further comprising:

a first connection line connecting the first shielding layer of pixel areas adjacent to each other in a row direction; and

a second connection line connecting the first shielding layer of the pixel areas adjacent to each other in a column direction.

3 . The display panel of claim 1 , further comprising a second shielding layer between the substrate and the first semiconductor layer and overlapped with the first semiconductor layer.

4 . The display panel of claim 3 , wherein the first semiconductor layer and the second semiconductor layer each include a silicon semiconductor.

5 . The display panel of claim 3 , wherein the first shielding layer is connected with the second shielding layer.

6 . The display panel of claim 3 , further comprising:

a first connection line connecting the second shielding layer of the pixel areas adjacent to each other in a row direction; and

a second connection line connecting the second shielding layer of the pixel areas adjacent to each other in a column direction.

7 . The display panel of claim 6 , wherein the first shielding layer, the second shielding layer, the first connection line, and the second connection line are formed as a single body.

8 . The display panel of claim 2 , further comprising an outer line in the peripheral area and connected to the first connection line and the second connection line.

9 . The display panel of claim 1 , wherein a voltage applied through the driving voltage line is a same as a voltage applied through the first shielding layer.

10 . The display panel of claim 1 , wherein the first shielding layer includes metal.

11 . A display panel comprising:

a substrate including a display area and a peripheral area surrounding the display area;

a pixel circuit in a pixel area in which a row and a column cross each other in the display area of the substrate, and including a driving transistor and a switching transistor between a data line and the driving transistor; and

a shielding layer including a first pattern overlapped with the driving transistor, a second pattern overlapped with the switching transistor, a first connection line extending from the first pattern in a row direction, and a second connection line extending from the first pattern in a column direction.

12 . The display panel of claim 11 , wherein the first connection line connects the first pattern in pixel areas adjacent to each other in a row direction, and

the second connection line connects the first pattern in the pixel areas adjacent to each other in a column direction.

13 . The display panel of claim 11 , wherein the first pattern is between the substrate and a semiconductor layer of the driving transistor, and the second pattern is between the substrate and a semiconductor layer of the switching transistor.

14 . The display panel of claim 13 , wherein the semiconductor layer of the driving transistor and the semiconductor layer of the switching transistor each include a silicon semiconductor.

15 . The display panel of claim 11 , wherein the first pattern is connected with the second pattern.

16 . The display panel of claim 11 , wherein the first pattern, the second pattern, the first connection line, and the second connection line are formed as a single body.

17 . The display panel of claim 11 , further comprising an outer line in the peripheral area and connected to the first connection line and the second connection line.

18 . The display panel of claim 11 , wherein the driving transistor is between a driving voltage line and a display element, and

a voltage applied through the driving voltage line is a same as a voltage applied through the shielding layer.

19 . The display panel of claim 18 , further comprising

an outer line in the peripheral area and connected to the first connection line and the second connection line; and

a driving voltage supply line in the peripheral area and connected to the driving voltage line,

wherein the outer line is connected to the driving voltage supply line.

20 . The display panel of claim 11 , wherein the shielding layer includes metal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2023
From: LHEE, ZAIL; PARK, YONGSUNG; LEE, DONGHYUN; YI, JUNGHUN; JUNG, JOOHYE
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 062359/0685 →
Priority Claims (2)
KR 10-2021-0187787 · Dec 24, 2021 · national
KR 10-2022-0126512 · Oct 4, 2022 · national
Continuity (1)
Related Publication 20230209901A1 · Jun 29, 2023
References Cited (12)
US 10978538B2 · Wang et al. · 2021 [cited by applicant]
US 11386854B2 · Kim et al. · 2022 [cited by applicant]
US 20190296099A1 · Lee · 2019 [cited by examiner]
US 20210066418A1 · Seo · 2021 [cited by examiner]
US 20210305340A1 · Kim et al. · 2021 [cited by applicant]
US 20210385959A1 · Wang · 2021 [cited by applicant]
US 20220231096A1 · Kim · 2022 [cited by examiner]
US 20220238608A1 · Moon · 2022 [cited by examiner]
US 20230363239A1 · Song · 2023 [cited by examiner]
KR 1020200016421A · 2020 [cited by applicant]
KR 1020200019306A · 2020 [cited by applicant]
KR 1020200029103A · 2020 [cited by applicant]