IP Library Granted Patent US 12,489,026
Granted Patent B2
US 12,489,026 · App. 16/858,457 · Granted Dec 2, 2025

Heating element and supporting circuitry for adapting a nominally rated semiconductor chip to an extremely cold environment

Inventors: Aslam Haswarey (Portland, OR); Kevin Wells (Folsom, CA); Mehran Adyani-Yazdi (Hillsboro, OR); Daniel R. Russell (Hillsboro, OR); James C. Mowery (Beaverton, OR); Vinesh Lal (Beaverton, OR); Xiangying Ma (Portland, OR)
Assignee: Intel Corporation
H01L23/345H05K1/0212H05K1/181H10D89/105
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Quick Facts
Patent No.
US 12,489,026
App. No.
16/858,457
Granted
Dec 2, 2025
Kind
B2
Abstract

A thermal control circuit is described. The thermal control circuit includes a heating element disposed within an electronic circuit board having a semiconductor chip disposed thereon. The thermal control circuit includes a power management integrated circuit coupled to the heating element. The power management integrated circuit is to enable the heating element to heat the semiconductor chip at least to the semiconductor chips' lowest rated operating temperature prior to the semiconductor chip being placed in a fully operational state.

Claims (27)

1 . A thermal control circuit, comprising:

a heating element disposed within an electronic circuit board having a semiconductor chip disposed thereon; and,

a power management integrated circuit coupled to the heating element, the power management integrated circuit to enable the heating element to heat the semiconductor chip to within the semiconductor chip's rated operating temperature range prior to the semiconductor chip being placed in an operational state.

2 . The thermal control circuit of claim 1 wherein the power management integrated circuit includes an embedded processor to execute program code to control the heating of the heating element.

3 . The thermal control circuit of claim 1 wherein the semiconductor chip is a system-on-chip.

4 . The thermal control circuit of claim 1 wherein the electronic circuit board, semiconductor chip and power management integrated circuit are components of a computing system.

5 . The thermal control circuit of claim 1 wherein the semiconductor chip is a commercial grade semiconductor chip.

6 . The thermal control circuit of claim 1 wherein the power management integrated circuit is to enable the heating element prior to boot-up of a computing system that includes the electronic circuit board, the semiconductor chip and the power management integrated circuit.

7 . The thermal control circuit of claim 1 wherein the electronic circuit board is a component within a computing system and the semiconductor chip comprises any of:

a general purpose processing core;

a memory controller;

a graphics processing core.

8 . The thermal control circuit of claim 1 wherein the electronic circuit board is a component within a networking system and the semiconductor chip comprises any of:

a switch;

a router.

9 . A machine readable storage medium containing program code that when processed by an embedded processor of a power management integrated circuit causes the power management integrated circuit to perform a method, comprising:

determine that a semiconductor chip's temperature is below its rated operating temperature range and, in response thereto, enable a heating element embedded in an electronic circuit board that the semiconductor chip is disposed on;

monitor the temperature of the semiconductor chip while the heating element is generating heat; and,

disable the heating element in response to the semiconductor chip's temperature having reached the rated operating temperature range.

10 . The machine readable medium of claim 9 wherein the program code is executed prior to execution of a computing system's boot-up program code.

11 . A method performed by a power management integrated circuit, comprising:

determining that a semiconductor chip's temperature is below its rated operating temperature range and, in response thereto, enabling a heating element embedded in an electronic circuit board that the semiconductor chip is disposed on;

monitoring the temperature of the semiconductor chip while the heating element is generating heat;

disabling the heating element in response to the semiconductor chip having reached the rated operating temperature.

12 . The method of claim 11 wherein the power management integrated circuit is a component within a data center.

13 . The method of claim 11 wherein the power management integrated circuit is a component within a computing system.

14 . The method of claim 11 wherein the power management circuit is a component within a rack mountable sled.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2020
From: HASWAREY, ASLAM; WELLS, KEVIN; ADYANI-YAZDI, MEHRAN; RUSSELL, DANIEL R.; MOWERY, JAMES C.; LAL, VINESH; MA, XIANGYING
To: INTEL CORPORATION
Reel/Frame 052495/0085 →
Continuity (2)
Provisional Application 62839535 · Apr 26, 2019
Related Publication 20200258804A1 · Aug 13, 2020
References Cited (7)
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