IP Library › Granted Patent US 12,489,058
Granted Patent B2
US 12,489,058 · App. 18/486,574 · Granted Dec 2, 2025

Wiring material for semiconductor device, wiring for semiconductor device including the same, and semiconductor device including the wiring

Inventors: Joungeun Yoo (Seongnam-si, KR); Youngjae Kang (Suwon-si, KR); Duseop Yoon (Seongnam-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L23/53209C22C29/14H01L21/28506H01L21/76802H01L21/76816H01L21/76829H01L21/76831H01L21/76843H01L21/76846H01L21/76877H01L23/53219H01L23/53257H01L23/53261B22F2302/35
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Quick Facts
Patent No.
US 12,489,058
App. No.
18/486,574
Granted
Dec 2, 2025
Kind
B2
Abstract

Provided are a wiring material for a semiconductor device, the wiring material including a boride-based compound containing boron and at least one metal selected from elements of Groups 2 to 14, a wiring for a semiconductor device including the same, and a semiconductor device including the wiring containing the wiring material.

Claims (43)

1 . A semiconductor device comprising:

a wiring including a boride-based compound containing boron and at least one metal selected from W, Mo, Ta, Nb, Cr, V, Fe, Ni, Co, Ti, Hf, U, Mg, Mn, Al, Dy, Er, La, Ce, In, or Ga,

wherein an amount of boron in the boride-based compound ranges from 25 at. % to 88 at. %.

2 . The semiconductor device of claim 1 , further comprising:

a semiconductor substrate; and

an interconnected structure on the semiconductor substrate, wherein

the interconnected structure includes a dielectric layer on the semiconductor substrate,

the dielectric layer has at least one trench formed therein,

the at least one trench includes a trench,

the interconnected structure includes the wiring, and

the wiring is in the trench.

3 . The semiconductor device of claim 2 , wherein the interconnected structure further includes a barrier layer covering surrounding the wiring in the trench.

4 . The semiconductor device of claim 2 , wherein

the trench of the interconnected structure extends through a thickness of the interconnected structure, and a depth of the trench is less than a thickness of the interconnected structure.

5 . The semiconductor device of claim 2 , wherein the interconnected structure further includes a liner layer surrounding the wiring inside the trench.

6 . The semiconductor device of claim 5 , wherein the liner layer exposes a top surface of the wiring.

7 . The semiconductor device of claim 5 , wherein the liner layer includes titanium nitride (TiN), titanium tungsten (TiW), tungsten nitride (WN), tantalum nitride (TaN), Ti, Ta, or a combination thereof.

8 . The semiconductor device of claim 2 , wherein the interconnected structure further comprises a barrier layer covering the wiring inside the trench, and the barrier layer has a single layered structure or a multi-layered structure, and the barrier layer exposes a top surface of the wiring.

9 . The semiconductor device of claim 2 , further comprising:

a logic device on the semiconductor substrate.

10 . The semiconductor device of claim 1 , further comprising:

a dielectric layer having a trench formed therein, wherein

the wiring is in the trench.

11 . The semiconductor device of claim 1 , wherein the at least one metal is tantalum (Ta), vanadium (V), titanium (Ti), hafnium (Hf), uranium (U), manganese (Mn), dysprosium (Dy), erbium (Er), cerium (Ce), indium (In), gallium (Ga), or a combination thereof.

12 . The semiconductor device of claim 1 , wherein the at least one metal is tantalum (Ta), vanadium (V), or a combination thereof.

13 . The semiconductor device of claim 1 , wherein the boride-based compound is a compound represented by Formula 1:

M a B b   [Formula 1]

wherein M in Formula 1 is Ta, V, or a combination thereof,

a is a number of 1 to 5, and

b is a number of 1 to 10.

14 . The semiconductor device of claim 1 , wherein the boride-based compound has a 1D figure of merit of 6.7 or less.

15 . The semiconductor device of claim 1 , wherein the boride-based compound has a 1D figure of merit of 3 to 6.2.

16 . The semiconductor device of claim 1 , wherein the boride-based compound has a 3D figure of merit of 7.5 or less.

17 . The semiconductor device of claim 1 , wherein the boride-based compound has a 3D figure of merit of 4.5 to 7.5.

18 . The semiconductor device of claim 1 , wherein the boride-based compound has a melting point of 2000° C. or greater.

19 . The semiconductor device of claim 1 , wherein the boride-based compound is TaB 2 , TiB 2 , HfB 2 , UB 2 , MnB 2 , DyB 2 , ErB 2 , Mn 3 B 4 , DyB 4 , ErB 4 , UB 4 , DyB 6 , ErB 6 , or a combination thereof.

20 . A semiconductor device comprising:

a dielectric layer including a trench;

a wiring in the trench, the wiring including a wiring material; and

a barrier layer in the trench and surrounding the wiring, wherein

the wiring material includes a boride-based compound containing boron and at least one metal selected from elements of Groups 2 to 14,

in the wiring material, an amount of boron in the boride-based compound ranges from 25 at. % to 88 at. %,

a material of the barrier layer is different than the boride-based compound.

Priority Claims (1)
KR 10-2020-0110591 · Aug 31, 2020 · national
Continuity (2)
Continuation 17376624 · Jul 15, 2021
Related Publication 20240038664A1 · Feb 1, 2024
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