IP Library Granted Patent US 12,493,485
Granted Patent B2
US 12,493,485 · App. 18/469,069 · Granted Dec 9, 2025

Method and apparatus for processing interrupt request

Inventors: Fangming Chai (Dongguan, CN); Wenjing Wang (Shenzhen, CN); Kun Huang (Wuhan, CN)
Assignee: HUAWEI TECHNOLOIGES CO. LTD.
G06F9/4812G06F9/526
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Quick Facts
Patent No.
US 12,493,485
App. No.
18/469,069
Granted
Dec 9, 2025
Kind
B2
Abstract

A method for processing an interrupt request includes: receiving a first interrupt request, where operations that the first interrupt request requests to execute include a first operation, execution of the first operation needs to occupy a critical resource, and the critical resource cannot be simultaneously occupied by a plurality of operations; determining, based on at least the received first interrupt request, that the first operation is an operation that does not need to be executed immediately; and storing the first operation into a temporary storage area.

Claims (108)

1 . A method comprising:

receiving a first interrupt request requesting to execute a first operation, wherein requesting to execute the first operation comprises requesting to occupy a critical resource that cannot be simultaneously occupied by a plurality of second operations, and wherein the second operations comprise the first operation;

storing, when the first operation is not to be executed immediately, the first operation into a temporary storage area storing an operation that occupies the critical resource and that a received interrupt request requests to execute,

wherein storing the first operation into the temporary storage area is based on a context corresponding to the first interrupt request being a first interrupt context; and

wherein the first interrupt request is further for requesting to execute a third operation different from the first operation, and wherein the method further comprises:

executing the third operation;

when executing the third operation has ended:

return a second interrupt context corresponding to a second interrupt request; or

return a task context, wherein a second priority of the second interrupt request is lower than a first priority of the first interrupt request; and

wherein to return the task context and the task context indicates that the third operation does not occupy the critical resource includes:

setting a mutual exclusion flag;

reading and executing at least one operation temporarily stored in the temporary storage area, wherein the at least one operation comprises the first operation; and

clearing the mutual exclusion flag when the temporary storage area does not comprise a remaining operation.

2 . The method of claim 1 , wherein before receiving the first interrupt request, the method further comprises:

executing a fourth operation by occupying the critical resource;

determining, based on the mutual exclusion flag that is set in an operating system, that the first operation cannot be executed immediately, wherein the mutual exclusion flag indicates that the critical resource is occupied; and

further storing, in response to determining that the first operation cannot be executed immediately, the first operation into the temporary storage area.

3 . The method of claim 2 , wherein before executing the fourth operation, the method further comprises:

when the mutual exclusion flag is not set in the operating system:

disabling task preemption; and

setting the mutual exclusion flag.

4 . The method of claim 3 , wherein after executing the fourth operation, the method further comprises:

reading and executing at least one fifth operation temporarily stored in the temporary storage area, wherein the at least one fifth operation comprises the first operation; and

when the temporary storage area does not comprise a remaining operation:

clearing the mutual exclusion flag; and

enabling the task preemption.

5 . The method of claim 4 , further comprising:

disabling reception of a third interrupt request;

determining that the temporary storage area temporarily stores the at least one fifth operation;

reading a sixth operation from the temporary storage area;

enabling reception of the third interrupt request; and

executing the sixth operation, wherein the sixth operation is one of the at least one fifth operation.

6 . The method of claim 1 , wherein before setting the mutual exclusion flag, the method further comprises obtaining a spin lock, and wherein the spin lock prevents a plurality of processors from performing parallel processing.

7 . The method of claim 1 , further comprising:

receiving a task request requesting to execute a fourth operation, wherein requesting to execute the fourth operation comprises requesting to occupy the critical resource;

disabling task preemption and setting a mutual exclusion flag in an operating system based on a context corresponding to the task request being a task context, wherein the mutual exclusion flag indicates that the critical resource is occupied; and

executing the fourth operation,

wherein after executing the fourth operation has ended, the method further comprises:

reading and executing at least one operation temporarily stored in the temporary storage area; and

clearing the mutual exclusion flag when the temporary storage area does not comprise a remaining operation.

8 . The method of claim 1 , wherein before storing the first operation into the temporary storage area, the method further comprises:

disabling reception of a third interrupt request; and

enabling reception of the second interrupt request when the temporary storage area is not full and after storing the first operation into the temporary storage area.

9 . An apparatus comprising:

a memory configured to store instructions; and

one or more processors coupled to the memory and configured to execute the instructions to cause the apparatus to:

receive a first interrupt request requesting to execute a first operation, wherein requesting to execute the first operation comprises requesting to occupy a critical resource that cannot be simultaneously occupied by a plurality of second operations, and wherein the second operations comprise the first operation;

store, when the first operation is not to be executed immediately, the first operation into a temporary storage area storing an operation that occupies the critical resource and that a received interrupt request requests to execute,

wherein storing the first operation into the temporary storage area is based on a context corresponding to the first interrupt request being a first interrupt context; and

wherein the first interrupt request is further for requesting to execute a third operation different from the first operation, and wherein the instructions further cause the apparatus to:

execute the third operation;

when executing the third operation has ended:

return a second interrupt context corresponding to a second interrupt request; or

return a task context, wherein a second priority of the second interrupt request is lower than a first priority of the first interrupt request; and

wherein to return the task context and the task context indicates that the third operation does not occupy the critical resource includes to:

set a mutual exclusion flag;

read and execute at least one operation temporarily stored in the temporary storage area, wherein the at least one operation comprises the first operation; and

clear the mutual exclusion flag when the temporary storage area does not comprise a remaining operation.

10 . The apparatus of claim 9 , wherein the one or more processors are further configured to execute the instructions to cause the apparatus to:

execute a fourth operation by occupying the critical resource;

determine, based on the mutual exclusion flag that is set in an operating system, that the first operation cannot be executed immediately, wherein the mutual exclusion flag indicates that the critical resource is occupied; and

further store, in response to determining that the first operation cannot be executed immediately, the first operation into the temporary storage area.

11 . The apparatus of claim 10 , wherein the one or more processors are further configured to execute the instructions to cause the apparatus to:

when the mutual exclusion flag is not set in the operating system:

disable task preemption; and

set the mutual exclusion flag.

12 . The apparatus of claim 11 , wherein the one or more processors are further configured to execute the instructions to cause the apparatus to:

read and execute at least one fifth operation temporarily stored in the temporary storage area, wherein the at least one fifth operation comprises the first operation; and

when the temporary storage area does not comprise a remaining operation:

clear the mutual exclusion flag; and

enable the task preemption.

13 . The apparatus of claim 9 , wherein the one or more processors are further configured to execute the instructions to cause the apparatus to obtain a spin lock, and wherein the spin lock is configured to prevent a plurality of second processors from performing parallel processing.

14 . The apparatus of claim 9 , wherein the one or more processors are further configured to execute the instructions to cause the apparatus to:

receive a task request requesting to execute a fourth operation, wherein requesting to execute the fourth operation comprises requesting to occupy the critical resource;

disable task preemption and set a mutual exclusion flag in an operating system based on a context corresponding to the task request being a task context, wherein the mutual exclusion flag indicates that the critical resource is occupied; and

execute the fourth operation,

wherein after executing the fourth operation has ended, the one or more processors are further configured to execute the instructions to cause the apparatus to:

read and execute at least one operation temporarily stored in the temporary storage area; and

clear the mutual exclusion flag when the temporary storage area does not comprise a remaining operation.

15 . The apparatus of claim 9 , wherein a structure of the temporary storage area comprises any one of the following:

a linked list structure;

a heap structure; or

a queue structure.

16 . A computer program product comprising computer-executable instructions that are stored on a non-transitory computer-readable medium and that, when executed by one or more processors, cause an apparatus to:

receive a first interrupt request requesting to execute a first operation, wherein requesting to execute the first operation comprises requesting to occupy a critical resource that cannot be simultaneously occupied by a plurality of second operations, and wherein the second operations comprise the first operation;

store, when the first operation is not to be executed immediately, the first operation into a temporary storage area storing an operation that occupies the critical resource and that a received interrupt request requests to execute;

wherein storing the first operation into the temporary storage area is based on a context corresponding to the first interrupt request being a first interrupt context; and

wherein the first interrupt request is further for requesting to execute a third operation different from the first operation, and wherein the instructions further cause the apparatus to:

execute the third operation;

when executing the third operation has ended:

return a second interrupt context corresponding to a second interrupt request; or

return a task context, wherein a second priority of the second interrupt request is lower than a first priority of the first interrupt request; and

wherein to return the task context and the task context indicates that the third operation does not occupy the critical resource includes to:

set a mutual exclusion flag;

read and execute at least one operation temporarily stored in the temporary storage area, wherein the at least one operation comprises the first operation; and

clear the mutual exclusion flag when the temporary storage area does not comprise a remaining operation.

17 . The method of claim 1 , wherein a structure of the temporary storage area comprises any one of the following:

a linked list structure;

a heap structure; or

a queue structure.

18 . The computer program product of claim 16 , wherein a structure of the temporary storage area comprises any one of the following:

a linked list structure;

a heap structure; or

a queue structure.

19 . The computer program product of claim 16 , wherein the one or more processors are further configured to execute the instructions to cause the apparatus to obtain a spin lock, and wherein the spin lock is configured to prevent a plurality of second processors from performing parallel processing.

20 . The computer program product of claim 16 , wherein before storing the first operation into the temporary storage area, the instructions, when executed by one or more processors, cause an apparatus to:

disable reception of a third interrupt request; and

enable reception of the second interrupt request when the temporary storage area is not full and after storing the first operation into the temporary storage area.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2025
From: CHAI, FANGMING; WANG, WENJING; HUANG, KUN
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 072108/0568 →
Priority Claims (1)
CN 202110284998.2 · Mar 17, 2021 · national
Continuity (2)
Continuation PCTCN2022080992 · Mar 15, 2022
Related Publication 20240004695A1 · Jan 4, 2024
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