IP Library Granted Patent US 12,494,172
Granted Patent B2
US 12,494,172 · App. 18/916,510 · Granted Dec 9, 2025

Pixel circuit and display device including same

Inventors: Young Joon Lee (Paju-si, KR); Woo Kyu Sang (Paju-si, KR)
Assignee: LG Display Co., Ltd.
G09G3/3233G09G3/2096G09G2300/0819G09G2300/0842G09G2310/08G09G2320/0247G09G2320/0252G09G2330/021H10K59/131
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Quick Facts
Patent No.
US 12,494,172
App. No.
18/916,510
Granted
Dec 9, 2025
Kind
B2
Abstract

A pixel circuit of a display device presented herein includes a driving element including a first electrode connected to a first node, a gate electrode connected to a second node, and a second electrode connected to a third node; a first switch element connecting the second node to the third node; a second switch element applying a data voltage to the first node; a third switch element connecting a pixel driving voltage line to the first node; a fourth switch element connecting the third node to a fourth node; a fifth switch element applying a first initialization voltage to the second node; a sixth switch element applying a second initialization voltage to the fourth node; a capacitor connected to the pixel driving voltage line and the second node; and a light-emitting element connected to the fourth node and a low potential power voltage line.

Claims (34)

1 . A pixel circuit, comprising:

a driving element including a first electrode connected to a first node of the pixel circuit, a gate electrode connected to a second node of the pixel circuit, and a second electrode connected to a third node of the pixel circuit;

a first switch element connecting the second node to the third node in response to a first gate signal;

a second switch element applying a data voltage to the first node in response to a second gate signal;

a third switch element connecting a pixel driving voltage line of the pixel circuit to the first node in response to a third gate signal;

a fourth switch element connecting the third node to a fourth node of the pixel circuit in response to the third gate signal;

a fifth switch element applying a first initialization voltage to the second node in response to a fourth gate signal;

a sixth switch element applying a second initialization voltage to the fourth node in response to the second gate signal;

a capacitor connected to the pixel driving voltage line and the second node; and

a light-emitting element connected to the fourth node and a low potential power voltage line of the pixel circuit.

2 . The pixel circuit of claim 1 , wherein:

the pixel circuit is driven in an order of an initialization step, an on-bias stress (OBS) step, a sampling step, and a light emission step,

in the initialization step, the fifth switch element is turned and a voltage of the second node is discharged to the first initialization voltage, and the sixth switch element is turned on and a voltage of the fourth node is discharged to the second initialization voltage, and

in the OBS step, the second switch element is turned on and the data voltage of a previous frame is applied to the first node.

3 . The pixel circuit of claim 2 , wherein, in the sampling step, both the first switch element and the second switch element are turned on and the data voltage of a current frame is applied to the first node.

4 . A display device, comprising:

a pixel array with a plurality of data lines, a plurality of gate lines, and a plurality of pixel circuits;

a data driver outputting a data voltage to the plurality of data lines; and

a gate driver outputting gate signals to the plurality of gate lines,

wherein each of the plurality of pixel circuits comprises:

a driving element including a first electrode connected to a first node of the pixel circuit, a gate electrode connected to a second node of the pixel circuit, and a second electrode connected to a third node of the pixel circuit;

a first switch element connecting the second node to the third node in response to a first gate signal;

a second switch element applying the data voltage to the first node in response to a second gate signal;

a third switch element connecting a pixel driving voltage line to the first node in response to a third gate signal;

a fourth switch element connecting the third node to a fourth node in response to the third gate signal;

a fifth switch element applying a first initialization voltage to the second node in response to a fourth gate signal;

a sixth switch element applying a second initialization voltage to the fourth node in response to the second gate signal;

a capacitor connected to the pixel driving voltage line and the second node; and

a light-emitting element connected to the fourth node and a low potential power voltage line.

5 . The display device of claim 4 , wherein:

each of the plurality of pixel circuits is driven in an order of an initialization step, an on-bias stress (OBS) step, a sampling step, and a light emission step,

in the initialization step, the fifth switch element is turned on and a voltage of the second node is discharged to the first initialization voltage, and the sixth switch element is turned on and a voltage of the fourth node is discharged to the second initialization voltage, and

in the OBS step, the second switch element is turned on and the data voltage of a previous frame is applied to the first node.

6 . The display device of claim 5 , wherein, in the sampling step, both the first switch element and the second switch element are turned on and the data voltage of a current frame is applied to the first node.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2024
From: LEE, YOUNG JOON; SANG, WOO KYU
To: LG DISPLAY CO., LTD.
Reel/Frame 069175/0081 →
Priority Claims (1)
KR 10-2023-0172215 · Dec 1, 2023 · national
Continuity (1)
Related Publication 20250182692A1 · Jun 5, 2025
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