IP Library Granted Patent US 12,499,074
Granted Patent B2
US 12,499,074 · App. 17/853,502 · Granted Dec 16, 2025

Die-to-die interconnect protocol layer

Inventors: Debendra Das Sharma (Saratoga, CA); Swadesh Choudhary (Mountain View, CA); Narasimha Lanka (Dublin, CA); Lakshmipriya Seshan (Sunnyvale, CA); Gerald Pasdast (San Jose, CA); Zuoguo Wu (San Jose, CA)
Assignee: Intel Corporation
G06F13/4221G06F11/1004G06F13/409
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Quick Facts
Patent No.
US 12,499,074
App. No.
17/853,502
Granted
Dec 16, 2025
Kind
B2
Abstract

Protocol layer logic in a protocol stack receives an indication that a particular mode is to be utilized on a die-to-die (D2D) link connecting a first device to a second device. The protocol layer logic generates data to be sent on the D2D link to adapt the particular data format to a flit format defined for use on the D2D link in the particular mode, the flit format comprises providing a set of reserved fields to be completed by an adapter block positioned between the protocol circuitry and a physical layer block. The data in the flit format is sent to the data to the adapter block to prepare the data for transmission over the D2D link.

Claims (37)

1 . An apparatus comprising:

protocol circuitry to implement a particular interconnect protocol, wherein the particular interconnect protocol defines a particular data format, and the protocol circuitry is to:

receive an indication that a particular mode in a plurality of modes associated with the particular interconnect protocol is to be utilized on a die-to-die (D2D) link, wherein the D2D link is to connect a first die to a second die, and a plurality of flit formats are defined to correspond to the plurality of modes;

generate data to be sent on the D2D link, wherein the data is generated to adapt the particular data format to a particular flit format in the plurality of flit formats defined for use on the D2D link in the particular mode, and adapting the particular data format to the particular flit format comprises providing a set of reserved fields to be completed by an adapter block positioned between the protocol circuitry and a physical layer block; and

send the data to the adapter block to prepare the data for transmission over the D2D link by the physical layer block.

2 . The apparatus of claim 1 , wherein the indication is received from the adapter block, the adapter block is to populate the set of reserved fields with information prior to transmission of the data over the D2D link.

3 . The apparatus of claim 2 , wherein the set of reserved fields are to be populated by the protocol circuitry under a native version of the particular interconnect protocol, but are instead populated by the adapter blocks in the data based on the particular mode.

4 . The apparatus of claim 3 , wherein the protocol circuitry populates the set of reserved fields with all zeroes based on the particular mode.

5 . The apparatus of claim 3 , wherein the set of reserved fields comprises a cyclic redundancy check (CRC) field.

6 . The apparatus of claim 3 , wherein the set of reserved fields comprises a header field.

7 . The apparatus of claim 1 , wherein the indication is based on characteristics of the D2D link determined during link training.

8 . The apparatus of claim 7 , wherein the characteristics comprise whether the D2D link includes extra lanes provisioned for lane repair on the D2D link, and protocol data in a portion of the particular data format is allocated for transmission using the extra lanes.

9 . The apparatus of claim 1 , wherein the plurality of modes comprise a standard flit mode, an optimized mode, and a raw mode.

10 . The apparatus of claim 9 , wherein the protocol circuitry is to generate data to include reserved portions to be completed by the adapter block in the standard mode and the optimized mode, and the protocol circuitry is to generate data in unmodified form in the raw mode, wherein the adapter block is to pass data generated by the protocol circuitry to the physical layer block as-is in the raw mode.

11 . The apparatus of claim 9 , wherein the set of reserved fields are defined according to a mapping for the particular interconnect protocol.

12 . The apparatus of claim 11 , wherein the particular interconnect protocol comprises one of Peripheral Component Interconnect Express (PCIe) or Compute Express Link (CXL), and a respective predefined mapping is provided for each of the standard mode, the optimized mode, and raw mode for the particular interconnect protocol.

13 . The apparatus of claim 1 , wherein the particular flit format is defined in another interconnect protocol different from the particular interconnect protocol.

14 . A method comprising:

determining that a particular operational mode in a plurality of different operational modes for a particular interconnect protocol is supported by both a first die and a second die for use on a die-to-die (D2D) link, wherein the first die and the second die are to be connected by the D2D link;

generating data, at a protocol layer of the first die, to be sent over the D2D link to the second die, wherein the protocol layer is to implement the particular interconnect protocol and the particular interconnect protocol defines a particular data format;

converting the data from the particular data format to a flit format defined for use on the D2D link to generate adapted data based on the particular operational mode; and

passing the adapted data from the protocol layer to an adapter block of the first die, wherein the adapter block is positioned between the protocol layer and a physical layer (PHY) block of the first die, wherein the PHY block is to implement a physical layer of the D2D link.

15 . The method of claim 14 , wherein the flit format comprises a set of reserved fields to replace fields defined in the particular interconnect protocol, and the adapter block is complete the set of reserved fields before forwarding the adapted data to the PHY block.

16 . The method of claim 15 , further comprising sending the adapted data with the completed set of reserved fields to the second die over the D2D link.

17 . A system comprising:

a first die; and

a second die coupled to the first die by a die-to-die (D2D) link, wherein the second die comprises a port to connect the second die to the D2D link, and the port comprises:

protocol layer logic to implement a particular interconnect protocol, wherein the particular interconnect protocol defines a particular data format;

die-to-die adapter circuitry; and

physical layer circuitry,

wherein the die-to-die adapter is positioned between the protocol layer logic and the physical layer circuitry in a protocol stack for the D2D link, and the protocol logic is executable to:

receive an indication that a particular one of a plurality of different operational modes is to be utilized for the particular interconnect protocol on the D2D link, wherein a plurality of flit formats are defined to correspond to the plurality of different operational modes;

generate data to be sent on the D2D link based on the particular operational mode, wherein the data is generated to adapt the particular data format to a particular flit format in the plurality of flit formats defined for use on the D2D link in the particular operational mode, wherein the particular flit format comprises a set of reserved fields to replace fields defined in the particular data format; and

send the data in the particular flit format to the die-to-die adapter circuitry, wherein the die-to-die adapter circuitry is to populate the set of reserved fields with additional data to generate flit data for transmission over the D2D link to the first die.

18 . The system of claim 17 , wherein the first die comprises a processor device, and the second die comprises one of another processor device, a hardware accelerator, or an input/output (I/O) device.

19 . The system of claim 17 , wherein the first die and the second die are on a same package.

20 . The system of claim 17 , wherein the first die comprises a first retimer, the second die comprises a second retimer, the first die and the second die are on separate packages, and the D2D link implements an off-package interconnect.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2022
From: DAS SHARMA, DEBENDRA; CHOUDHARY, SWADESH; LANKA, NARASIMHA; SESHAN, LAKSHMIPRIYA; PASDAST, GERALD; WU, ZUOGUO
To: INTEL CORPORATION
Reel/Frame 060375/0063 →
Continuity (2)
Provisional Application 63295155 · Dec 30, 2021
Related Publication 20220327084A1 · Oct 13, 2022
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