IP Library › Granted Patent US 12,499,803
Granted Patent B2
US 12,499,803 · App. 18/948,473 · Granted Dec 16, 2025

Display apparatus and method of operating the same

Inventors: Sungsoo Choi (Yongin-si, KR); Jaehoon Lee (Yongin-si, KR); Junpyo Lee (Yongin-si, KR); Wonjin Seo (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/20G09G2300/0819G09G2300/0842G09G2300/0861G09G2320/0233G09G2320/0257G09G2330/021
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,499,803
App. No.
18/948,473
Granted
Dec 16, 2025
Kind
B2
Abstract

A display apparatus is disclosed that includes a display panel including a pixel, a gate driver applying a gate signal, a data driver applying a data voltage, an emission driver applying an emission signal and a power voltage generator receiving a sensed power voltage and outputting a compensated power voltage. The pixel includes a driving transistor including a first control electrode receiving the data voltage, a second control electrode connected to a hold capacitor, a first electrode receiving a first power voltage and a second electrode connected to a first electrode of a light emitting element, the hold capacitor including a first electrode receiving the first power voltage and a second electrode connected to the second control electrode of the driving transistor and the light emitting element including a first electrode receiving the first power voltage and a second electrode receiving a second power voltage.

Claims (75)

1 . A display apparatus comprising:

a display panel including a pixel;

a gate driver configured to apply a gate signal to the pixel;

a data driver configured to apply a data voltage to the pixel;

an emission driver configured to apply an emission signal to the pixel; and

a power voltage generator configured to receive a sensed power voltage from the display panel and configured to output a compensated power voltage to the display panel,

wherein the pixel comprises:

a driving transistor including a first control electrode configured to receive the data voltage, a second control electrode connected to a hold capacitor, a first electrode configured to receive a first power voltage and a second electrode connected to a first electrode of a light emitting element;

the hold capacitor including a first electrode configured to receive the compensated power voltage and a second electrode connected to the second control electrode of the driving transistor; and

the light emitting element including the first electrode configured to receive the first power voltage and a second electrode configured to receive a second power voltage.

2 . The display apparatus of claim 1 , wherein the power voltage generator comprises:

a power voltage generating circuit configured to generate an initial power voltage;

a voltage calculator configured to receive the initial power voltage and the sensed power voltage and configured to output a calculated power voltage obtained by inversely amplifying a difference between the initial power voltage and the sensed power voltage; and

a power voltage outputter configured to receive the initial power voltage and the calculated power voltage and configured to output the compensated power voltage.

3 . The display apparatus of claim 2 , wherein the voltage calculator comprises:

a first capacitor including a first electrode configured to receive the sensed power voltage and a second electrode connected to a first node;

a first resistor including a first terminal connected to the first node and a second terminal connected to a third node;

a second resistor including a first terminal connected to the third node and a second terminal connected to a fourth node; and

an amplifier including a first input terminal connected to the third node, a second input terminal connected to a second node, the second input terminal configured to receive the initial power voltage, and an output terminal connected to the fourth node, and

wherein a voltage of the fourth node is the calculated power voltage.

4 . The display apparatus of claim 3 , wherein the voltage calculator further comprises a second capacitor connected to the second node.

5 . The display apparatus of claim 3 , wherein the fourth node is not connected to a capacitor.

6 . The display apparatus of claim 3 , wherein the pixel further comprises a reset transistor including a control electrode configured to receive a reset gate signal, a first electrode configured to receive a compensated reference voltage and a second electrode connected to the first control electrode of the driving transistor, and

wherein the compensated power voltage is the compensated reference voltage.

7 . The display apparatus of claim 3 , wherein the first power voltage is a compensated first power voltage, and

wherein the compensated power voltage is the compensated first power voltage.

8 . The display apparatus of claim 7 , wherein the emission signal includes a first emission signal and a second emission signal, and

wherein the pixel further comprises a first emission control transistor including a control electrode configured to receive the first emission signal, a first electrode configured to receive the compensated first power voltage and a second electrode connected to the first electrode of the driving transistor.

9 . The display apparatus of claim 1 , wherein the sensed power voltage is a sensed reference voltage,

wherein the compensated power voltage is a compensated reference voltage,

wherein the first electrode of the hold capacitor is configured to receive the compensated reference voltage, and

wherein the second electrode of the hold capacitor is connected to the second control electrode of the driving transistor.

10 . The display apparatus of claim 1 , wherein the sensed power voltage is a sensed first power voltage,

wherein the compensated power voltage is a compensated first power voltage,

wherein the first power voltage is the compensated first power voltage,

wherein the first electrode of the hold capacitor is configured to receive the compensated first power voltage, and

wherein the second electrode of the hold capacitor is connected to the second control electrode of the driving transistor.

11 . The display apparatus of claim 1 , wherein the pixel further comprises a storage capacitor including a first electrode connected to the first control electrode of the driving transistor and a second electrode connected to the second electrode of the driving transistor.

12 . The display apparatus of claim 1 , wherein the pixel further comprises an initialization transistor including a control electrode configured to receive an initialization gate signal, a first electrode configured to receive an initialization voltage and a second electrode connected to the second electrode of the driving transistor.

13 . The display apparatus of claim 1 , wherein the emission signal includes a first emission signal and a second emission signal, and

wherein the pixel further comprises a second emission control transistor including a control electrode configured to receive the second emission signal, a first electrode connected to the second electrode of the driving transistor and a second electrode connected to the first electrode of the light emitting element.

14 . A method of operating a display apparatus, the method comprising:

generating an initial power voltage;

receiving a sensed power voltage;

generating a calculated power voltage obtained by inversely amplifying a difference between the initial power voltage and the sensed power voltage; and

outputting a compensated power voltage to a second control electrode of a driving transistor of a pixel based on the initial power voltage and the calculated power voltage.

15 . The method of claim 14 , wherein the pixel comprises:

the driving transistor including a first control electrode configured to receive a data voltage, a second control electrode connected to a hold capacitor, a first electrode configured to receive a first power voltage and a second electrode connected to a first electrode of a light emitting element;

a write transistor configured to apply the data voltage to the driving transistor;

the hold capacitor including a first electrode configured to receive the compensated power voltage and a second electrode connected to the second control electrode of the driving transistor; and

the light emitting element including a first electrode configured to receive the first power voltage and a second electrode configured to receive a second power voltage.

16 . The method of claim 15 , wherein the sensed power voltage is a sensed reference voltage,

wherein the compensated power voltage is a compensated reference voltage,

wherein the first electrode of the hold capacitor is configured to receive the compensated reference voltage, and

wherein the second electrode of the hold capacitor is connected to the second control electrode of the driving transistor.

17 . The method of claim 15 , wherein the sensed power voltage is a sensed first power voltage,

wherein the compensated power voltage is a compensated first power voltage,

wherein the first power voltage is the compensated first power voltage,

wherein the first electrode of the hold capacitor is configured to receive the compensated first power voltage, and

wherein the second electrode of the hold capacitor is connected to the second control electrode of the driving transistor.

18 . The method of claim 15 , wherein the pixel further comprises a reset transistor including a control electrode configured to receive a reset gate signal, a first electrode configured to receive a compensated reference voltage and a second electrode connected to the first control electrode of the driving transistor.

19 . The method of claim 15 , wherein the pixel further comprises an initialization transistor including a control electrode configured to receive an initialization gate signal, a first electrode configured to receive an initialization voltage and a second electrode connected to the second electrode of the driving transistor.

20 . The method of claim 15 , wherein the pixel further comprises a storage capacitor including a first electrode connected to the first control electrode of the driving transistor and a second electrode connected to the second electrode of the driving transistor.

21 . An electronic apparatus comprising:

a display panel including a pixel;

a gate driver configured to apply a gate signal to the pixel;

a data driver configured to apply a data voltage to the pixel;

an emission driver configured to apply an emission signal to the pixel;

a power voltage generator configured to receive a sensed power voltage from the display panel and configured to output a compensated power voltage to the display panel;

a driving controller configured to control the gate driver, the data driver, the emission driver and the power voltage generator based on an input control signal; and

a processor configured to output the input control signal,

wherein the pixel comprises:

a driving transistor including a first control electrode configured to receive the data voltage, a second control electrode connected to a hold capacitor, a first electrode configured to receive a first power voltage and a second electrode connected to a first electrode of a light emitting element;

the hold capacitor including a first electrode configured to receive the compensated power voltage and a second electrode connected to the second control electrode of the driving transistor; and

the light emitting element including the first electrode configured to receive the first power voltage and a second electrode configured to receive a second power voltage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2024
From: CHOI, SUNGSOO; LEE, JAEHOON; LEE, JUNPYO; SEO, WONJIN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 069272/0160 →
Priority Claims (1)
KR 10-2023-0157858 · Nov 15, 2023 · national
Continuity (1)
Related Publication 20250157376A1 · May 15, 2025
References Cited (6)
US 9997096B2 · Shin · 2018 [cited by applicant]
US 11373573B2 · Park · 2022 [cited by applicant]
US 20140168194A1 · Kong · 2014 [cited by examiner]
US 20170337875A1 · Jeon · 2017 [cited by examiner]
KR 102248841B1 · 2021 [cited by applicant]
KR 1020210122607A · 2021 [cited by applicant]