Semiconductor device
A semiconductor device includes an insulated gate bipolar transistor region having a base layer of a second conductivity type provided in a surface layer of the semiconductor substrate on a first main surface side, an emitter layer of a first conductivity type having an impurity concentration higher than that of a drift layer selectively provided in the surface layer of the base layer on the first main surface side, a plurality of gate electrodes facing the emitter layer, the base layer, and the drift layer via gate insulating films, a counter-doped layer, having an impurity concentration of the second conductivity type higher than that of the base layer and an impurity concentration of the first conductivity type higher than that of the drift layer, and a collector layer of the second conductivity type provided in the surface layer of the semiconductor substrate on a second main surface side.
1 . A semiconductor device comprising:
a semiconductor substrate having a drift layer of a first conductivity type between a first main surface and a second main surface opposite to the first main surface;
a diode region having an anode layer of a second conductivity type provided in a surface layer of the semiconductor substrate on the first main surface side and a cathode layer of the first conductivity type provided in a surface layer of the semiconductor substrate on the second main surface side;
an insulated gate bipolar transistor region arranged in line with the diode region along the first main surface of the semiconductor substrate in a first direction having a base layer of the second conductivity type provided in the surface layer of the semiconductor substrate on the first main surface side, an emitter layer of the first conductivity type having an impurity concentration higher than that of the drift layer selectively provided in a surface layer of the base layer on the first main surface side, a plurality of gate electrodes arranged side by side in the first direction and facing the emitter layer, the base layer, and the drift layer via gate insulating films, a counter-doped layer provided in a surface layer of the base layer, having an impurity concentration of the second conductivity type higher than that of the base layer and an impurity concentration of the first conductivity type higher than that of the drift layer, and a collector layer of the second conductivity type provided in the surface layer of the semiconductor substrate on the second main surface side, wherein
each of the counter-doped layer and the emitter layer has a longitudinal direction and a lateral direction orthogonal to the longitudinal direction in plan view, and
a maximum width of the lateral direction of the counter-doped layer is narrower than a width of the lateral direction of the emitter layer.
2 . The semiconductor device according to claim 1 , wherein
the counter-doped layer is arranged interposed between the base layers between the adjacent gate electrodes in the first direction.
3 . The semiconductor device according to claim 1 , further comprising
a base contact layer of the second conductivity type, provided in the surface layer of the base layer and having an impurity concentration higher than that of the base layer, wherein
the counter-doped layer is arranged interposed between the base contact layers between the adjacent gate electrodes in the first direction.
4 . The semiconductor device according to claim 3 , wherein
impurities for the second conductivity type of the counter-doped layer are a same as impurities of the second conductivity type of the base contact layer.
5 . The semiconductor device according to claim 1 , wherein
impurities for the first conductivity type of the counter-doped layer are the same as impurities of the first conductivity type of the emitter layer.
6 . The semiconductor device according to claim 1 , wherein
an impurity concentration of the first conductivity type in the counter-doped layer is higher than an impurity concentration of the second conductivity type in the counter-doped layer.
7 . The semiconductor device according to claim 1 , wherein
an impurity concentration of the first conductivity type in the counter-doped layer is lower than an impurity concentration of the second conductivity type in the counter-doped layer.
8 . The semiconductor device according to claim 1 , wherein
the counter-doped layer is in contact with the emitter layer in a third direction orthogonal to the first and second directions.
9 . The semiconductor device according to claim 1 , wherein
the insulated gate bipolar transistor region has a first region in which the counter-doped layer is provided between the adjacent gate electrodes and a second region being adjacent to the first region in which the counter-doped layer is provided so as to have a larger area ratio than the first region, and
the first region is closer to the diode region than the second region.
10 . The semiconductor device according to claim 1 , wherein
the insulated gate bipolar transistor region has a third region in which the counter-doped layer is provided between the adjacent gate electrodes and a fourth region in which the counter-doped layer is not provided between the adjacent gate electrodes, and
the third region is closer to the diode region than the fourth region.
11 . The semiconductor device according to claim 1 , wherein
the diode region has
a high impurity concentration anode layer provided in the surface layer on the first main surface, and
a low impurity concentration anode layer provided closer to the second main surface side than the high impurity concentration anode layer and having an impurity concentration lower than that of the high impurity concentration anode layer.