Display panel having hollow opening and display device
A display panel includes an array substrate and an encapsulation layer encapsulated on a surface of the array substrate. The display panel further includes a stretching area located in a corner area of the display panel and at least partially located in a display area of the display panel, and the stretching area is provided with a hollow opening penetrating through the array substrate and the encapsulation layer.
1 . A display panel, comprising an array substrate and a display area, wherein the display panel further comprises:
a stretching area, located in a corner area of the display panel and at least partially located in the display area of the display panel, the stretching area being provided with a hollow opening penetrating through the array substrate,
wherein the display panel further comprises an encapsulation layer encapsulated on a surface of the array substrate, and the hollow opening penetrates through the encapsulation layer,
wherein the display panel further comprises a normal display area located in the display area, the array substrate comprises a base substrate and a functional layer on a surface of the base substrate facing the encapsulation layer, sub-pixel units are formed in the functional layer, and the stretching area comprises:
a first stretching area, located in the display area, a pixel density of the first stretching area being smaller than a pixel density of the normal display area,
wherein the display panel further comprises a frame area around the display area, and the stretching area further comprises:
a second stretching area, located in the frame area,
wherein the display panel further comprises:
a transition area, located in the display area between the first stretching area and the normal display area and provided with a sub-pixel unit, a pixel density of the transition area being smaller than the pixel density of the normal display area,
wherein the first stretching area, the second stretching area and the transition area are fan shapes respectively and are concentric.
2 . The display panel according to claim 1 ,
wherein an orthographic projection, on the base substrate, of each sub-pixel unit in the first stretching area does not overlap with an orthographic projection of the hollow opening on the base substrate.
3 . The display panel according to claim 1 ,
wherein a gate driving circuit is integrated in the transition area, and the gate driving circuit is configured to provide a driving signal to sub-pixel units, of a same row, in the transition area, the first stretching area and the normal display area, and
wherein an orthographic projection, on the base substrate, of each sub-pixel unit in the transition area does not overlap with an orthographic projection of the gate driving circuit on the base substrate.
4 . The display panel according to claim 3 , wherein the gate driving circuit comprises:
a first gate driving circuit, configured to provide a gate driving signal to the sub-pixel units; and
a second gate driving circuit, configured to provide an enable signal to the sub-pixel units.
5 . The display panel according to claim 3 , wherein the display panel is a rounded rectangle and comprises four stretching areas, and the four stretching areas are respectively located in four rounded corner areas of the rounded rectangle.
6 . The display panel according to claim 5 , wherein the first stretching area is located at a side of the second stretching area facing a center of a circle where the second stretching area is located, and the transition area is located at a side of the first stretching area facing a center of a circle where the first stretching area is located.
7 . The display panel according to claim 3 , wherein in the normal display area:
an R pixel opening, a G pixel opening, and a B pixel opening are sequentially and alternatively distributed along a same pixel opening row;
in the same pixel opening row, two G pixel openings distributed along a column direction are arranged between the R pixel opening and the B pixel opening;
in adjacent pixel opening rows, pixel openings of a same color are not located in a same column; and
in two pixel opening rows separated by one pixel opening row, the pixel openings of the same color are located in the same column.
8 . The display panel according to claim 7 , wherein in the first stretching area and the transition area:
the display panel comprises a plurality of pixel islands distributed in an array, and the orthographic projection of the hollow opening on the base substrate is located between orthographic projections of adjacent pixel islands on the base substrate; and
the orthographic projection of the gate driving circuit on the base substrate is located between the orthographic projections of the adjacent pixel islands on the base substrate.
9 . The display panel according to claim 8 , wherein,
each of the pixel islands comprises the B pixel opening and the R pixel opening located in a first pixel opening row and adjacently arranged, two G pixel openings located in a second pixel row and distributed along the column direction, and the B pixel opening and the R pixel opening located in a third pixel opening row and adjacently arranged; and
the second pixel opening row is located between the first pixel opening row and the third pixel opening row, the pixel openings of the same color are located in the same column, and the pixel openings of different colors are located in different columns.
10 . The display panel according to claim 8 , wherein,
each of the pixel islands comprises the R pixel opening, the G pixel opening, and the B pixel opening located in the same pixel opening row, and in the same pixel opening row, the R pixel opening and the G pixel opening are distributed along the column direction.
11 . The display panel according to claim 9 , wherein each of the sub-pixel units comprises a light-emitting unit and a pixel driving circuit for supplying a driving current to the light-emitting unit, and in the first stretching area and the transition area, an aspect ratio of the pixel driving circuit is 3:1; and
in the normal display area, the aspect ratio of the pixel driving circuit is 2:1.
12 . The display panel according to claim 11 , wherein the display panel further comprises a first gate layer on a surface of the base substrate, the pixel driving circuit comprises a driving transistor and a capacitor connected to a gate of the driving transistor,
the pixel driving circuit in the first stretching area and the transition area comprises:
a first conductive part, located in the first gate layer and forming the gate of the driving transistor and a first electrode of the capacitor,
the pixel driving circuit in the normal display area comprises:
a second conductive part, located in the first gate layer and forming the gate of the driving transistor and the first electrode of the capacitor,
wherein a ratio of a dimension in a row direction to a dimension in the column direction of the first conductive part is smaller than a ratio of a dimension in the row direction to a dimension in the column direction of the second conductive part, the row direction is a width direction of the pixel driving circuit, and the column direction is a length direction of the pixel driving circuit.
13 . The display panel according to claim 11 , wherein the display panel further comprises an active layer and a second gate layer, the active layer is located on a surface of the base substrate, the second gate layer is located on a surface of the active layer away from the base substrate, the pixel driving circuit comprises a driving transistor and a second transistor, a second terminal of the second transistor is connected to a gate of the driving transistor, and the second transistor is of a dual-channel structure,
the pixel driving circuit in the normal display area comprises:
a first active part, located in the active layer and connected between two channels of the second transistor; and
a first shielding part, located in the second gate layer and connected to a stable voltage source, an orthographic projection of the first shielding part on the base substrate extending in a row direction, and at least partially overlapping with an orthographic projection, on the base substrate, of the first active part in the pixel driving circuit adjacent to the first shielding part,
the pixel driving circuit in the first stretching area and the transition area comprises:
a second active part, located in the active layer and connected between the two channels of the second transistor;
a third active part, connected to the gate of the driving transistor; and
a second shielding part, located in the second gate layer and connected to the stable voltage source, the second shielding part comprising a first sub-shielding part and a second sub-shielding part that are connected to each other, an orthographic projection of the first sub-shielding part on the base substrate extending in the column direction, and an orthographic projection of the second sub-shielding part on the base substrate extending in the row direction,
wherein the orthographic projection of the first sub-shielding on the base substrate at least partially overlaps with an orthographic projection of the third active part on the base substrate, and the orthographic projection of the second sub-shielding part on the base substrate at least partially overlaps with an orthographic projection, on the base substrate, of the second active part in the pixel driving circuit adjacent to the second sub-shielding part.
14 . A display device, comprising a display panel, wherein the display panel comprises:
an array substrate and a display area;
a stretching area, located in a corner area of the display panel and at least partially located in the display area of the display panel, the stretching area being provided with a hollow opening penetrating through the array substrate,
wherein the display panel further comprises an encapsulation layer encapsulated on a surface of the array substrate, and the hollow opening penetrates through the encapsulation layer,
wherein the display panel further comprises a normal display area located in the display area, the array substrate comprises a base substrate and a functional layer on a surface of the base substrate facing the encapsulation layer, sub-pixel units are formed in the functional layer, and the stretching area comprises:
a first stretching area, located in the display area, a pixel density of the first stretching area being smaller than a pixel density of the normal display area,
wherein the display panel further comprises a frame area around the display area, and the stretching area further comprises:
a second stretching area, located in the frame area,
wherein the display panel further comprises:
a transition area, located in the display area between the first stretching area and the normal display area and provided with a sub-pixel unit, a pixel density of the transition area being smaller than the pixel density of the normal display area,
wherein the first stretching area, the second stretching area and the transition area are fan shapes respectively and are concentric.
15 . The display panel according to claim 10 , wherein each of the sub-pixel units comprises a light-emitting unit and a pixel driving circuit for supplying a driving current to the light-emitting unit, and in the first stretching area and the transition area, an aspect ratio of the pixel driving circuit is 3:1; and
in the normal display area, the aspect ratio of the pixel driving circuit is 2:1.
16 . The display panel according to claim 15 , wherein the display panel further comprises a first gate layer on a surface of the base substrate, the pixel driving circuit comprises a driving transistor and a capacitor connected to a gate of the driving transistor,
the pixel driving circuit in the first stretching area and the transition area comprises:
a first conductive part, located in the first gate layer and forming the gate of the driving transistor and a first electrode of the capacitor,
the pixel driving circuit in the normal display area comprises:
a second conductive part, located in the first gate layer and forming the gate of the driving transistor and the first electrode of the capacitor,
wherein a ratio of a dimension in a row direction to a dimension in the column direction of the first conductive part is smaller than a ratio of a dimension in the row direction to a dimension in the column direction of the second conductive part, the row direction is a width direction of the pixel driving circuit, and the column direction is a length direction of the pixel driving circuit.