IP Library › Granted Patent US 12,506,450
Granted Patent B2
US 12,506,450 · App. 17/955,989 · Granted Dec 23, 2025

Power amplifier bias circuit

Inventor: Philip John Lehtola (Cedar Rapids, IA)
Assignee: Skyworks Solutions, Inc.
H03F3/21H03F1/302H03F3/19H03F2200/21H03F2200/411H03F2200/451
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Quick Facts
Patent No.
US 12,506,450
App. No.
17/955,989
Granted
Dec 23, 2025
Kind
B2
Abstract

A power amplifier comprises a first transistor, a second transistor, a first emitter follower, a first bias resistor, and coupling circuitry configured to couple the first bias resistor to a base of the first transistor, the first bias resistor, the second bias resistor, and an emitter of the first emitter follower at a first node, and a base of the first emitter follower to the second transistor.

Claims (34)

1 . A power amplifier comprising:

a first transistor;

a second transistor;

a first emitter follower;

a first diode;

a first bias resistor; and

coupling circuitry configured to couple the first bias resistor to a base of the first transistor, the first bias resistor to an emitter of the first emitter follower at a first node, and a base of the first emitter follower to an anode of the first diode and a source of the second transistor at a second node; a second emitter follower; a second diode; the coupling circuitry further configured to couple an emitter of the first emitter follower and an emitter of the second emitter follower to a base of the first transistor, the coupling circuitry further configured to couple a cathode of the first diode to a cathode of the second diode.

2 . The power amplifier of claim 1 wherein the coupling circuitry is further configured to couple the base of the first emitter follower to a source of the second transistor.

3 . The power amplifier of claim 1 wherein the first transistor is a bipolar junction transistor (BJT), the first emitter follower is a BJT, and the second transistor is a field-effect transistor (FET).

4 . The power amplifier of claim 1 further comprising a third transistor.

5 . The power amplifier of claim 4 wherein the coupling circuitry is further configured to couple a base of the third transistor to a source of the second transistor.

6 . The power amplifier of claim 4 further comprising a first reference resistor coupled between the base of the third transistor and a cathode of the first diode.

7 . The power amplifier of claim 4 further comprising a second diode coupled to a collector of the third transistor.

8 . The power amplifier of claim 4 further comprising a fourth transistor.

9 . The power amplifier of claim 8 wherein the coupling circuitry is further configured to couple a source or drain of the third transistor to a source or drain of the fourth transistor.

10 . The power amplifier of claim 8 further comprising a second diode coupled to a source or drain of the fourth transistor.

11 . The power amplifier of claim 4 further comprising a second emitter follower.

12 . The power amplifier of claim 11 wherein the coupling circuitry is further configured to couple an emitter of the second emitter follower to the emitter of the first emitter follower.

13 . The power amplifier of claim 11 further comprising a second bias resistor and a third bias resistor, wherein the emitter of the first emitter follower is directly coupled to the second bias resistor, the emitter of the second emitter follower is directly coupled to the third bias resistor, and the second bias resistor is directly coupled to the third bias resistor.

14 . A circuit comprising:

a first bipolar junction transistor (BJT);

a first emitter follower;

a second emitter follower;

a first field-effect transistor (FET);

a second FET;

a first diode;

a second diode; and

coupling circuitry configured to directly couple a base of the first emitter follower to a source of the first FET and an anode of the first diode, the coupling circuitry further configured to couple an emitter of the first emitter follower and an emitter of the second emitter follower to a base of the first BJT, the coupling circuitry further configured to couple a cathode of the first diode to a cathode of the second diode.

15 . The circuit of claim 14 further comprising a first bias resistor directly coupled to the emitter of the first emitter follower and a second bias resistor directly coupled to the emitter of the second emitter follower.

16 . The circuit of claim 15 wherein the coupling circuitry is further configured to directly couple the first bias resistor to the second bias resistor.

17 . The circuit of claim 15 wherein the first bias resistor has a greater resistance than the second bias resistor.

18 . The circuit of claim 17 further comprising a first reference resistor directly coupled to the cathode of the first diode and a second reference resistor directly coupled to the cathode of the second diode.

19 . The circuit of claim 18 wherein the first reference resistor is directly coupled to the second reference resistor.

20 . The circuit of claim 18 wherein first reference resistor has equal resistance to the first bias resistor and the second reference resistor has equal resistance to the second bias resistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2023
From: LEHTOLA, PHILIP JOHN
To: SKYWORKS SOLUTIONS, INC.
Reel/Frame 064737/0677 →
Continuity (2)
Provisional Application 63249884 · Sep 29, 2021
Related Publication 20230095390A1 · Mar 30, 2023
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