IP Library Granted Patent US 12,512,401
Granted Patent B2
US 12,512,401 · App. 18/419,763 · Granted Dec 30, 2025

Integrated device substrate including embedded electromagnetic isolation structure

Inventors: Yue Li (San Diego, CA); Durodami Lisk (San Diego, CA); Charles David Paynter (Encinitas, CA)
Assignee: QUALCOMM INCORPORATED
H01L23/49838H01L21/4846H01L23/552H05K1/0222H01L24/16H01L2224/16227
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,512,401
App. No.
18/419,763
Granted
Dec 30, 2025
Kind
B2
Abstract

An integrated device includes a substrate that includes one or more conductors and a conductive wall via defining at least a portion of an electromagnetic (EM) isolation structure for the one or more conductors.

Claims (21)

1 . An integrated device comprising:

a substrate comprising:

one or more conductors, wherein the one or more conductors include a conductive via; and

a conductive wall via defining at least a portion of an electromagnetic (EM) isolation structure for the one or more conductors, wherein the conductive wall via includes a curved portion defining an arc spanning at least 90 degrees, and wherein the curved portion at least partially encircles the conductive via.

2 . The integrated device of claim 1 , wherein the substrate further comprises a reference voltage conductor, and wherein the EM isolation structure is electrically connected to the reference voltage conductor.

3 . The integrated device of claim 1 , wherein the conductive wall via extends through a dielectric layer, and the EM isolation structure further comprises a pad of a metal layer adjacent to the dielectric layer.

4 . The integrated device of claim 3 , wherein the one or more conductors include a second pad of the metal layer, wherein the pad at least partially encircles the second pad.

5 . The integrated device of claim 4 , further comprising a conductive trace electrically connected to the second pad.

6 . An integrated device comprising:

a substrate comprising:

one or more conductors, wherein the one or more conductors include a conductive trace;

a first metal layer;

a second metal layer that includes the conductive trace and a wall via pad;

a third metal layer, wherein the second metal layer is between the first metal layer and the third metal layer; and

a conductive wall via that defines at least a portion of an electromagnetic (EM) isolation structure for the one or more conductors, wherein a length of the conductive wall via extends along a length of the conductive trace, and wherein the conductive wall via extends through a first dielectric layer between the first metal layer and the second metal layer and is electrically connected to the wall via pad.

7 . The integrated device of claim 6 , wherein the EM isolation structure further comprises a second conductive wall via on a side of the conductive trace opposite the conductive wall via.

8 . The integrated device of claim 6 , wherein the EM isolation structure fully encloses the conductive trace along at least a portion of the length of the conductive trace.

9 . The integrated device of claim 6 , wherein the EM isolation structure further comprises a second conductive wall via extending through a second dielectric layer between the second metal layer and the third metal layer, and wherein the second conductive wall via is electrically connected to the wall via pad.

10 . The integrated device of claim 9 , wherein the EM isolation structure further comprises:

a third conductive wall via extending through the first dielectric layer and electrically connected to a second wall via pad of the second metal layer; and

a fourth conductive wall via extending through the second dielectric layer and electrically connected to the second wall via pad.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2024
From: LI, YUE; LISK, DURODAMI; PAYNTER, CHARLES DAVID
To: QUALCOMM INCORPORATED
Reel/Frame 066545/0906 →
Continuity (1)
Related Publication 20250239513A1 · Jul 24, 2025
References Cited (2)
US 10373901B1 · Tsao · 2019 [cited by examiner]
US 20020130739A1 · Cotton · 2002 [cited by examiner]